AMBA CHI-G SVT UVM Documentation - Interfaces Reference

Product	Interface Group	Interfaces
amba_svt	Default Group	svt_axi_if
CHI Request Node interface. This is a sub-interface of svt_chi_if.	svt_chi_rn_if
CHI Slave Node interface. This is a sub-interface of svt_chi_if.	svt_chi_sn_if
CHI IC Request Node interface. This is a sub-interface of svt_chi_if.	svt_chi_ic_rn_if
CHI IC Slave Node interface. This is a sub-interface of svt_chi_if.	svt_chi_ic_sn_if
Top Level interface for CHI VIP	svt_chi_if	svt_chi_ic_sn_if, svt_chi_sn_if, svt_chi_ic_rn_if, svt_chi_rn_if

interface svt_chi_rn_if ( input logic clk, input logic resetn ) General description: The RN interface svt_chi_rn_if defines the CHI signals appropriate for a fully coherent Request Node, along with the modports needed for the CHI RN and monitor VIP. RN interface is a sub-interface to the top level interface svt_chi_if. Clock signal description: Clock signal is obtained in this RN interface through interface port list. User provides this signal from the testbench to the top level interface svt_chi_if through interface port list. The top level interface then passes this signal down to the RN sub-interface. Debug port description: The CHI VIP drives the object number of the transaction corresponding to a flit on the debug ports. The CHI VIP drives the current l-credit count corresponding to each virtual channel on the debug ports. curr_req_lcrd_count : Current TX REQ VC l-credit count, will be driven whenever there is a change in TX REQ VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_txrsp_lcrd_count : Current TX RSP VC l-credit count, will be driven whenever there is a change in TX RSP VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_txdat_lcrd_count : Current TX DAT VC l-credit count, will be driven whenever there is a change in TX DAT VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_snp_lcrd_count : Current RX SNP VC l-credit count, will be driven whenever there is a change in RX SNP VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_snp_vc_flit_buffer_size curr_rxrsp_lcrd_count : Current RX RSP VC l-credit count, will be driven whenever there is a change in RX RSP VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_rsp_vc_flit_buffer_size curr_rxdat_lcrd_count : Current RX DAT VC l-credit count, will be driven whenever there is a change in RX DAT VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_dat_vc_flit_buffer_size CHI signal description: This sub-interface supports signals for the CHI protocol. The names of the signals match the names specified in the CHI specification. Please refer to the CHI specification for specific description of any of the signals.

Ports
bit	is_active
logic	TXSACTIVE
logic	RXSACTIVE
logic	TXLINKACTIVEREQ
logic	TXLINKACTIVEACK
logic	RXLINKACTIVEREQ
logic	RXLINKACTIVEACK
logic	SYSCOREQ
logic	SYSCOACK
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0]	TXREQFLITPEND
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0]	TXREQFLITV
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][SVT_CHI_MAX_REQ_FLIT_WIDTH-1:0]	TXREQFLIT
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0]	TXREQLCRDV
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0]	RXRSPFLITPEND
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0]	RXRSPFLITV
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0]	RXRSPFLIT
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0]	RXRSPLCRDV
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0]	RXDATFLITPEND
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0]	RXDATFLITV
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0]	RXDATFLIT
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0]	RXDATLCRDV
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0]	RXSNPFLITPEND
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0]	RXSNPFLITV
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][SVT_CHI_MAX_SNP_FLIT_WIDTH-1:0]	RXSNPFLIT
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0]	RXSNPLCRDV
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0]	TXRSPFLITPEND
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0]	TXRSPFLITV
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0]	TXRSPFLIT
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0]	TXRSPLCRDV
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0]	TXDATFLITPEND
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0]	TXDATFLITV
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0]	TXDATFLIT
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0]	TXDATLCRDV
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	req_obj_num
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	rx_rsp_obj_num
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	rx_dat_obj_num
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	tx_rsp_obj_num
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	tx_dat_obj_num
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_req_obj_num
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_dat_obj_num
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_rsp_obj_num
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_req_lcrd_count
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_txrsp_lcrd_count
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_txdat_lcrd_count
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_snp_lcrd_count
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_rxrsp_lcrd_count
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_rxdat_lcrd_count
string	full_name

Modports
modport rn_modport ( input resetn, clocking rn_cb ) Modport used to connect the VIP HN to CHI interface signals.

modport monitor_modport ( input resetn, clocking monitor_cb ) Modport used to connect the VIP Monitor to CHI interface signals.

modport rn_async_modport ( output TXSACTIVE, input RXSACTIVE, output TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, output RXLINKACTIVEACK, output SYSCOREQ, input SYSCOACK, output TXREQFLITPEND, output TXREQFLITV, output TXREQFLIT, input TXREQLCRDV, input RXRSPFLITPEND, input RXRSPFLITV, input RXRSPFLIT, output RXRSPLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, output RXDATLCRDV, input RXSNPFLITPEND, input RXSNPFLITV, input RXSNPFLIT, output RXSNPLCRDV, output TXRSPFLITPEND, output TXRSPFLITV, output TXRSPFLIT, input TXRSPLCRDV, output TXDATFLITPEND, output TXDATFLITV, output TXDATFLIT, input TXDATLCRDV ) Asynchronous modport suitable for SV RN Bind interface.

modport monitor_async_modport ( input TXSACTIVE, input RXSACTIVE, input TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, input RXLINKACTIVEACK, input SYSCOREQ, input SYSCOACK, input TXREQFLITPEND, input TXREQFLITV, input TXREQFLIT, input TXREQLCRDV, input RXRSPFLITPEND, input RXRSPFLITV, input RXRSPFLIT, input RXRSPLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, input RXDATLCRDV, input RXSNPFLITPEND, input RXSNPFLITV, input RXSNPFLIT, input RXSNPLCRDV, input TXRSPFLITPEND, input TXRSPFLITV, input TXRSPFLIT, input TXRSPLCRDV, input TXDATFLITPEND, input TXDATFLITV, input TXDATFLIT, input TXDATLCRDV ) Asynchronous monitor modport suitable for SV RN Bind interface connection in Passive mode. MTI and NC reported compile errors with synchronous monitor modport. This was required to resolve the above issue.

modport debug_modport ( output req_obj_num, output rx_rsp_obj_num, output rx_dat_obj_num, output tx_rsp_obj_num, output tx_dat_obj_num, output snp_req_obj_num, output snp_dat_obj_num, output snp_rsp_obj_num, output curr_req_lcrd_count, output curr_txrsp_lcrd_count, output curr_txdat_lcrd_count, output curr_snp_lcrd_count, output curr_rxrsp_lcrd_count, output curr_rxdat_lcrd_count ) Debug Modport

Clocking blocks
clocking rn_cb @ ( posedge clk ) default input #0.1 output #0.1 output TXSACTIVE, input RXSACTIVE, output TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, output RXLINKACTIVEACK, output SYSCOREQ, input SYSCOACK, output TXREQFLITPEND, output TXREQFLITV, output TXREQFLIT, input TXREQLCRDV, input RXRSPFLITPEND, input RXRSPFLITV, input RXRSPFLIT, output RXRSPLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, output RXDATLCRDV, input RXSNPFLITPEND, input RXSNPFLITV, input RXSNPFLIT, output RXSNPLCRDV, output TXRSPFLITPEND, output TXRSPFLITV, output TXRSPFLIT, input TXRSPLCRDV, output TXDATFLITPEND, output TXDATFLITV, output TXDATFLIT, input TXDATLCRDV Clocking block that defines VIP CHI RN Interface signal synchronization and directionality.

clocking monitor_cb @ ( posedge clk ) default input #0.1 output #0.1 input TXSACTIVE, input RXSACTIVE, input TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, input RXLINKACTIVEACK, input SYSCOREQ, input SYSCOACK, input TXREQFLITPEND, input TXREQFLITV, input TXREQFLIT, input TXREQLCRDV, input RXRSPFLITPEND, input RXRSPFLITV, input RXRSPFLIT, input RXRSPLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, input RXDATLCRDV, input RXSNPFLITPEND, input RXSNPFLITV, input RXSNPFLIT, input RXSNPLCRDV, input TXRSPFLITPEND, input TXRSPFLITV, input TXRSPFLIT, input TXRSPLCRDV, input TXDATFLITPEND, input TXDATFLITV, input TXDATFLIT, input TXDATLCRDV Clocking block that defines VIP CHI RN Monitor Interface signal synchronization and directionality.

Functions
void function	set_enable_signal_log ()
string function	get_full_name ()

interface svt_chi_sn_if ( input logic clk, input logic resetn ) General description: The SN interface svt_chi_sn_if defines the CHI signals appropriate for a fully coherent Slave Node, along with the modports needed for the CHI SN and monitor VIP. SN interface is a sub-interface to the top level interface svt_chi_if. Clock signal description: Clock signal is obtained in this SN interface through interface port list. User provides this signal from the testbench to the top level interface svt_chi_if through interface port list. The top level interface then passes this signal down to the SN sub-interface. Debug port description: The CHI VIP drives the object number of the transaction corresponding to a flit on the debug ports. The CHI VIP drives the current l-credit count corresponding to each virtual channel on the debug ports. curr_txrsp_lcrd_count : Current TX RSP VC l-credit count, will be driven whenever there is a change in TX RSP VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_txdat_lcrd_count : Current TX DAT VC l-credit count, will be driven whenever there is a change in TX DAT VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_req_lcrd_count : Current RX REQ VC l-credit count, will be driven whenever there is a change in RX REQ VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_req_vc_flit_buffer_size curr_rxdat_lcrd_count : Current RX DAT VC l-credit count, will be driven whenever there is a change in RX DAT VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_dat_vc_flit_buffer_size CHI signal description: This sub-interface supports signals for the CHI protocol. The names of the signals match the names specified in the CHI specification. Please refer to the CHI specification for specific description of any of the signals.

Ports
bit	is_active
logic	TXSACTIVE
logic	RXSACTIVE
logic	TXLINKACTIVEREQ
logic	TXLINKACTIVEACK
logic	RXLINKACTIVEREQ
logic	RXLINKACTIVEACK
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0]	RXREQFLITPEND
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0]	RXREQFLITV
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][SVT_CHI_MAX_REQ_FLIT_WIDTH-1:0]	RXREQFLIT
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0]	RXREQLCRDV
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0]	TXRSPFLITPEND
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0]	TXRSPFLITV
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0]	TXRSPFLIT
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0]	TXRSPLCRDV
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0]	TXDATFLITPEND
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0]	TXDATFLITV
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0]	TXDATFLIT
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0]	TXDATLCRDV
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0]	RXDATFLITPEND
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0]	RXDATFLITV
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0]	RXDATFLIT
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0]	RXDATLCRDV
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	req_obj_num
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	rx_dat_obj_num
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	tx_rsp_obj_num
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	tx_dat_obj_num
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_txdat_lcrd_count
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_txrsp_lcrd_count
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_req_lcrd_count
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_rxdat_lcrd_count
string	full_name

Modports
modport sn_modport ( input resetn, clocking sn_cb ) Modport used to connect the VIP HN to CHI interface signals.

modport monitor_modport ( input resetn, clocking monitor_cb ) Modport used to connect the VIP Monitor to CHI interface signals.

modport sn_async_modport ( output TXSACTIVE, input RXSACTIVE, output TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, output RXLINKACTIVEACK, input RXREQFLITPEND, input RXREQFLITV, input RXREQFLIT, output RXREQLCRDV, output TXRSPFLITPEND, output TXRSPFLITV, output TXRSPFLIT, input TXRSPLCRDV, output TXDATFLITPEND, output TXDATFLITV, output TXDATFLIT, input TXDATLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, output RXDATLCRDV ) Asynchronous modport suitable for SV SN Bind interface.

modport monitor_async_modport ( input TXSACTIVE, input RXSACTIVE, input TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, input RXLINKACTIVEACK, input RXREQFLITPEND, input RXREQFLITV, input RXREQFLIT, input RXREQLCRDV, input TXRSPFLITPEND, input TXRSPFLITV, input TXRSPFLIT, input TXRSPLCRDV, input TXDATFLITPEND, input TXDATFLITV, input TXDATFLIT, input TXDATLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, input RXDATLCRDV ) Asynchronous monitor modport suitable for SV SN Bind interface connection in Passive mode. MTI and NC reported compile errors with synchronous monitor modport. This was required to resolve the above issue.

modport debug_modport ( output req_obj_num, output rx_dat_obj_num, output tx_rsp_obj_num, output tx_dat_obj_num, output curr_req_lcrd_count, output curr_txdat_lcrd_count, output curr_txrsp_lcrd_count, output curr_rxdat_lcrd_count ) Debug Modport

Clocking blocks
clocking sn_cb @ ( posedge clk ) default input #0.1 output #0.1 output TXSACTIVE, input RXSACTIVE, output TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, output RXLINKACTIVEACK, input RXREQFLITPEND, input RXREQFLITV, input RXREQFLIT, output RXREQLCRDV, output TXRSPFLITPEND, output TXRSPFLITV, output TXRSPFLIT, input TXRSPLCRDV, output TXDATFLITPEND, output TXDATFLITV, output TXDATFLIT, input TXDATLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, output RXDATLCRDV Clocking block that defines VIP CHI SN Interface signal synchronization and directionality.

clocking monitor_cb @ ( posedge clk ) default input #0.1 output #0.1 input TXSACTIVE, input RXSACTIVE, input TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, input RXLINKACTIVEACK, input RXREQFLITPEND, input RXREQFLITV, input RXREQFLIT, input RXREQLCRDV, input TXRSPFLITPEND, input TXRSPFLITV, input TXRSPFLIT, input TXRSPLCRDV, input TXDATFLITPEND, input TXDATFLITV, input TXDATFLIT, input TXDATLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, input RXDATLCRDV Clocking block that defines VIP CHI SN Monitor Interface signal synchronization and directionality.

Functions
void function	set_enable_signal_log ()
string function	get_full_name ()

interface svt_chi_ic_rn_if ( input logic clk, input logic resetn ) General description: The RN interface svt_chi_ic_rn_if defines the CHI signals appropriate for an interconnect node that connects to a fully coherent Request Node, along with the modports needed for the CHI Interconnect and monitor VIP. IC RN interface is a sub-interface to the top level interface svt_chi_if. Clock signal description: Clock signal is obtained in this IC RN interface through interface port list. User provides this signal from the testbench to the top level interface svt_chi_if through interface port list. The top level interface then passes this signal down to the RN sub-interface. Debug port description: The CHI VIP drives the object number of the transaction corresponding to a flit on the debug ports. The CHI VIP drives the current l-credit count corresponding to each virtual channel on the debug ports. curr_snp_lcrd_count : Current TX SNP VC l-credit count, will be driven whenever there is a change in TX SNP VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_txrsp_lcrd_count : Current TX RSP VC l-credit count, will be driven whenever there is a change in TX RSP VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_txdat_lcrd_count : Current TX DAT VC l-credit count, will be driven whenever there is a change in TX DAT VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_req_lcrd_count : Current RX REQ VC l-credit count, will be driven whenever there is a change in RX REQ VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_req_vc_flit_buffer_size curr_rxrsp_lcrd_count : Current RX RSP VC l-credit count, will be driven whenever there is a change in RX RSP VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_rsp_vc_flit_buffer_size curr_rxdat_lcrd_count : Current RX DAT VC l-credit count, will be driven whenever there is a change in RX DAT VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_dat_vc_flit_buffer_size CHI signal description: This sub-interface supports signals for the CHI protocol. The names of the signals match the names specified in the CHI specification. Please refer to the CHI specification for specific description of any of the signals.

Ports
bit	is_active
logic	RXSACTIVE
logic	TXSACTIVE
logic	RXLINKACTIVEREQ
logic	RXLINKACTIVEACK
logic	TXLINKACTIVEREQ
logic	TXLINKACTIVEACK
logic	SYSCOREQ
logic	SYSCOACK
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0]	RXREQFLITPEND
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0]	RXREQFLITV
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][SVT_CHI_MAX_REQ_FLIT_WIDTH-1:0]	RXREQFLIT
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0]	RXREQLCRDV
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0]	TXRSPFLITPEND
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0]	TXRSPFLITV
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0]	TXRSPFLIT
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0]	TXRSPLCRDV
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0]	TXDATFLITPEND
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0]	TXDATFLITV
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0]	TXDATFLIT
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0]	TXDATLCRDV
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0]	TXSNPFLITPEND
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0]	TXSNPFLITV
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][SVT_CHI_MAX_SNP_FLIT_WIDTH-1:0]	TXSNPFLIT
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0]	TXSNPLCRDV
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0]	RXRSPFLITPEND
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0]	RXRSPFLITV
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0]	RXRSPFLIT
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0]	RXRSPLCRDV
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0]	RXDATFLITPEND
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0]	RXDATFLITV
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0]	RXDATFLIT
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0]	RXDATLCRDV
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	req_obj_num
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	rx_rsp_obj_num
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	rx_dat_obj_num
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	tx_rsp_obj_num
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	tx_dat_obj_num
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_req_obj_num
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_dat_obj_num
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_rsp_obj_num
logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_snp_lcrd_count
logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_txrsp_lcrd_count
logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_txdat_lcrd_count
logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_req_lcrd_count
logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_rxrsp_lcrd_count
logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_rxdat_lcrd_count
string	full_name

Modports
modport ic_rn_modport ( input resetn, clocking sn_cb ) Modport used to connect the VIP HN to CHI interface signals.

modport monitor_modport ( input resetn, clocking monitor_cb ) Modport used to connect the VIP Monitor to CHI interface signals.

modport debug_modport ( output req_obj_num, output rx_rsp_obj_num, output rx_dat_obj_num, output tx_rsp_obj_num, output tx_dat_obj_num, output snp_req_obj_num, output snp_dat_obj_num, output snp_rsp_obj_num, output curr_req_lcrd_count, output curr_txrsp_lcrd_count, output curr_txdat_lcrd_count, output curr_snp_lcrd_count, output curr_rxrsp_lcrd_count, output curr_rxdat_lcrd_count ) Debug Modport

Clocking blocks
clocking sn_cb @ ( posedge clk ) default input #0.1 output #0.1 input RXSACTIVE, output TXSACTIVE, input RXLINKACTIVEREQ, output RXLINKACTIVEACK, output TXLINKACTIVEREQ, input TXLINKACTIVEACK, input SYSCOREQ, output SYSCOACK, input RXREQFLITPEND, input RXREQFLITV, input RXREQFLIT, output RXREQLCRDV, output TXRSPFLITPEND, output TXRSPFLITV, output TXRSPFLIT, input TXRSPLCRDV, output TXDATFLITPEND, output TXDATFLITV, output TXDATFLIT, input TXDATLCRDV, output TXSNPFLITPEND, output TXSNPFLITV, output TXSNPFLIT, input TXSNPLCRDV, input RXRSPFLITPEND, input RXRSPFLITV, input RXRSPFLIT, output RXRSPLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, output RXDATLCRDV Clocking block that defines VIP CHI RN Interface signal synchronization and directionality.

clocking monitor_cb @ ( posedge clk ) default input #0.1 output #0.1 input TXSACTIVE, input RXSACTIVE, input TXLINKACTIVEREQ, input TXLINKACTIVEACK, input RXLINKACTIVEREQ, input RXLINKACTIVEACK, input SYSCOREQ, input SYSCOACK, input RXREQFLITPEND, input RXREQFLITV, input RXREQFLIT, input RXREQLCRDV, input TXRSPFLITPEND, input TXRSPFLITV, input TXRSPFLIT, input TXRSPLCRDV, input TXDATFLITPEND, input TXDATFLITV, input TXDATFLIT, input TXDATLCRDV, input TXSNPFLITPEND, input TXSNPFLITV, input TXSNPFLIT, input TXSNPLCRDV, input RXRSPFLITPEND, input RXRSPFLITV, input RXRSPFLIT, input RXRSPLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, input RXDATLCRDV Clocking block that defines VIP CHI RN Monitor Interface signal synchronization and directionality.

Functions
void function	set_enable_signal_log ()
string function	get_full_name ()

interface svt_chi_ic_sn_if ( input logic clk, input logic resetn ) General description: The SN interface svt_chi_ic_sn_if defines the CHI signals appropriate for a node in the interconnect that connects to a fully coherent Slave Node, along with the modports needed for the Interconnect and monitor VIP. IC SN interface is a sub-interface to the top level interface svt_chi_if. Clock signal description: Clock signal is obtained in this IC SN interface through interface port list. User provides this signal from the testbench to the top level interface svt_chi_if through interface port list. The top level interface then passes this signal down to the SN sub-interface. Debug port description: The CHI VIP drives the object number of the transaction corresponding to a flit on the debug ports. The CHI VIP drives the current l-credit count corresponding to each virtual channel on the debug ports. curr_req_lcrd_count : Current TX REQ VC l-credit count, will be driven whenever there is a change in TX REQ VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_txdat_lcrd_count : Current TX DAT VC l-credit count, will be driven whenever there is a change in TX DAT VC l-credit count On power up or reset will be driven to default l-credit count value zero curr_rxrsp_lcrd_count : Current RX RSP VC l-credit count, will be driven whenever there is a change in RX RSP VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_rsp_vc_flit_buffer_size curr_rxdat_lcrd_count : Current RX DAT VC l-credit count, will be driven whenever there is a change in RX DAT VC l-credit count On power up or reset will be driven to default l-credit count value svt_chi_node_configuration :: rx_dat_vc_flit_buffer_size CHI signal description: This sub-interface supports signals for the CHI protocol. The names of the signals match the names specified in the CHI specification. Please refer to the CHI specification for specific description of any of the signals.

Ports
bit	is_active
logic	TXSACTIVE
logic	RXSACTIVE
logic	RXLINKACTIVEREQ
logic	RXLINKACTIVEACK
logic	TXLINKACTIVEREQ
logic	TXLINKACTIVEACK
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0]	TXREQFLITPEND
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0]	TXREQFLITV
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][SVT_CHI_MAX_REQ_FLIT_WIDTH-1:0]	TXREQFLIT
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0]	TXREQLCRDV
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0]	RXRSPFLITPEND
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0]	RXRSPFLITV
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0]	RXRSPFLIT
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0]	RXRSPLCRDV
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0]	RXDATFLITPEND
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0]	RXDATFLITV
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0]	RXDATFLIT
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0]	RXDATLCRDV
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0]	TXDATFLITPEND
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0]	TXDATFLITV
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0]	TXDATFLIT
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0]	TXDATLCRDV
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	req_obj_num
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	rx_rsp_obj_num
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	rx_dat_obj_num
logic [(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	tx_rsp_obj_num
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	tx_dat_obj_num
logic [(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_req_obj_num
logic [(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_dat_obj_num
logic [(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	snp_rsp_obj_num
logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_req_lcrd_count
logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_txdat_lcrd_count
logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_rxrsp_lcrd_count
logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0]	curr_rxdat_lcrd_count
string	full_name

Modports
modport ic_sn_modport ( input resetn, clocking rn_cb ) Modport used to connect the VIP HN to CHI interface signals.

modport monitor_modport ( input resetn, clocking monitor_cb ) Modport used to connect the VIP Monitor to CHI interface signals.

modport debug_modport ( output req_obj_num, output rx_rsp_obj_num, output rx_dat_obj_num, output tx_rsp_obj_num, output tx_dat_obj_num, output snp_req_obj_num, output snp_dat_obj_num, output snp_rsp_obj_num, output curr_req_lcrd_count, output curr_txdat_lcrd_count, output curr_rxrsp_lcrd_count, output curr_rxdat_lcrd_count ) Debug Modport

Clocking blocks
clocking rn_cb @ ( posedge clk ) default input #0.1 output #0.1 output TXSACTIVE, input RXSACTIVE, input RXLINKACTIVEREQ, output RXLINKACTIVEACK, output TXLINKACTIVEREQ, input TXLINKACTIVEACK, output TXREQFLITPEND, output TXREQFLITV, output TXREQFLIT, input TXREQLCRDV, input RXRSPFLITPEND, input RXRSPFLITV, input RXRSPFLIT, output RXRSPLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, output RXDATLCRDV, output TXDATFLITPEND, output TXDATFLITV, output TXDATFLIT, input TXDATLCRDV Clocking block that defines VIP CHI SN Interface signal synchronization and directionality.

clocking monitor_cb @ ( posedge clk ) default input #0.1 output #0.1 input RXSACTIVE, input TXSACTIVE, input RXLINKACTIVEREQ, input RXLINKACTIVEACK, input TXLINKACTIVEREQ, input TXLINKACTIVEACK, input TXREQFLITPEND, input TXREQFLITV, input TXREQFLIT, input TXREQLCRDV, input RXRSPFLITPEND, input RXRSPFLITV, input RXRSPFLIT, input RXRSPLCRDV, input RXDATFLITPEND, input RXDATFLITV, input RXDATFLIT, input RXDATLCRDV, input TXDATFLITPEND, input TXDATFLITV, input TXDATFLIT, input TXDATLCRDV Clocking block that defines VIP CHI SN Monitor Interface signal synchronization and directionality.

Functions
void function	set_enable_signal_log ()
string function	get_full_name ()

interface svt_chi_if

(

input logic clk,
input logic resetn

)

General description:

CHI VIP provides the SystemVerilog interface which can be used to connect the VIP to the DUT. A top level interface svt_chi_if is defined. The top level interface contains an array of RN & SN interfaces. By default, 16 RN and 16 SN interfaces are defined in the top level interface. Currently, the maximum RN and SN interfaces supported is 512 and 128 respectively. The number of RN and SN interfaces in top level interface can be controlled using macros the SVT_CHI_MAX_NUM_RNS_{0..512} and SVT_CHI_MAX_NUM_SNS_{0..128} respectively. For example, if you want to use 8 RN interfaces and 10 SN interfaces, you can define following macros when compiling the VIP:

SVT_CHI_MAX_NUM_RNS_8

SVT_CHI_MAX_NUM_SNS_10
Please refer to User Guide section Overriding System Constants on how to provide these macro definitions to VIP.

Sub-interfaces:

Interface Name	Interface Description
svt_chi_rn_if	RN Interface used by RN VIP component contained within the CHI System component
svt_chi_sn_if	Sn Interface used by sn VIP component contained within the CHI System component

Clock signal description:

Common clock mode - Default usage:
- Clock signal 'clk' is provided to the svt_chi_if through interface port list.
- This clock signal is then passed down to the sub-interfaces for RN, SN.
Multi clock mode - Usage with port specific clock:
- This feature is enabled by defining the following compile time macro `SVT_CHI_ENABLE_MULTI_CLOCK
- An array of clocks meant for the each RN [(16-1):0] is supplied through interface port rn_clk[(16-1):0]. The RN sub-interface for a given index 'i' rn_if[i], ic_rn_if[i] is supplied with rn_clk[i].
- An array of clocks meant for the each SN [(16-1):0] is supplied through interface port sn_clk[(16-1):0]. The SN sub-interface for a given index 'i' sn_if[i], ic_sn_if[i] is supplied with sn_clk[i].

Reset signal description:

Common reset mode - Default usage:
- Reset signal 'resetn' is provided to the svt_chi_if through interface port list.
- This rest signal is then passed down to the sub-interfaces for RN, SN.
Multi reset mode - Usage with port specific reset:
- This feature is enabled by defining the following compile time macro `SVT_CHI_ENABLE_MULTI_RESET
- An array of resetn signals meant for the each RN [(16-1):0] is supplied through interface port rn_resetn[(16-1):0]. The RN sub-interface for a given index 'i' rn_if[i], ic_rn_if[i] is supplied with rn_resetn[i].
- An array of resetn signals meant for the each SN [(16-1):0] is supplied through interface port sn_resetn[(16-1):0]. The SN sub-interface for a given index 'i' sn_if[i], ic_sn_if[i] is supplied with sn_resetn[i].

Following is the interface definition:

interface svt_chi_if (
`ifndef SVT_CHI_ENABLE_MULTI_CLOCK
input logic clk,
`else
input logic rn_clk[(`SVT_CHI_MAX_NUM_RNS-1):0],
input logic sn_clk[(`SVT_CHI_MAX_NUM_SNS-1):0],
`endif
`ifndef SVT_CHI_ENABLE_MULTI_RESET
input logic resetn
`else
input logic rn_resetn[(`SVT_CHI_MAX_NUM_RNS-1):0],
input logic sn_resetn[(`SVT_CHI_MAX_NUM_SNS-1):0]
`endif
);

Sub-interfaces

svt_chi_rn_if

rn_if

svt_chi_ic_rn_if

ic_rn_if

svt_chi_sn_if

sn_if

svt_chi_ic_sn_if

ic_sn_if

Ports

string

full_name

Functions

void function

set_enable_signal_log ()

string function

get_full_name ()

function void
svt_chi_rn_if::set_enable_signal_log

( )

support for signal logging.

function string
svt_chi_rn_if::get_full_name

( )

Simple method for getting the full path for an interface or module.

interface svt_chi_rn_if signal
input logic clk

interface svt_chi_rn_if signal
input logic resetn

bit attribute
svt_chi_rn_if::is_active

logic attribute
svt_chi_rn_if::TXSACTIVE

logic attribute
svt_chi_rn_if::RXSACTIVE

logic attribute
svt_chi_rn_if::TXLINKACTIVEREQ

logic attribute
svt_chi_rn_if::TXLINKACTIVEACK

logic attribute
svt_chi_rn_if::RXLINKACTIVEREQ

logic attribute
svt_chi_rn_if::RXLINKACTIVEACK

logic attribute
svt_chi_rn_if::SYSCOREQ

logic attribute
svt_chi_rn_if::SYSCOACK

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0] attribute
svt_chi_rn_if::TXREQFLITPEND

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0] attribute
svt_chi_rn_if::TXREQFLITV

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][SVT_CHI_MAX_REQ_FLIT_WIDTH-1:0] attribute
svt_chi_rn_if::TXREQFLIT

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0] attribute
svt_chi_rn_if::TXREQLCRDV

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0] attribute
svt_chi_rn_if::RXRSPFLITPEND

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0] attribute
svt_chi_rn_if::RXRSPFLITV

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0] attribute
svt_chi_rn_if::RXRSPFLIT

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0] attribute
svt_chi_rn_if::RXRSPLCRDV

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_rn_if::RXDATFLITPEND

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_rn_if::RXDATFLITV

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0] attribute
svt_chi_rn_if::RXDATFLIT

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_rn_if::RXDATLCRDV

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0] attribute
svt_chi_rn_if::RXSNPFLITPEND

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0] attribute
svt_chi_rn_if::RXSNPFLITV

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][SVT_CHI_MAX_SNP_FLIT_WIDTH-1:0] attribute
svt_chi_rn_if::RXSNPFLIT

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0] attribute
svt_chi_rn_if::RXSNPLCRDV

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_rn_if::TXRSPFLITPEND

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_rn_if::TXRSPFLITV

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0] attribute
svt_chi_rn_if::TXRSPFLIT

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_rn_if::TXRSPLCRDV

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_rn_if::TXDATFLITPEND

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_rn_if::TXDATFLITV

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0] attribute
svt_chi_rn_if::TXDATFLIT

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_rn_if::TXDATLCRDV

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::req_obj_num

Object number of the transaction currently observed on REQ VC

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::rx_rsp_obj_num

Object number of the transaction currently observed on RX RSP VC

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::rx_dat_obj_num

Object number of the transaction currently observed on RX DAT VC

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::tx_rsp_obj_num

Object number of the transaction currently observed on TX RSP VC

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::tx_dat_obj_num

Object number of the transaction currently observed on TX DAT VC

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::snp_req_obj_num

Object number of the transaction currently observed on SNP VC

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::snp_dat_obj_num

Object number of the transaction currently observed on TX DAT VC, if it corresponds to a snoop transaction

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::snp_rsp_obj_num

Object number of the transaction currently observed on TX RSP VC, if it corresponds to a snoop transaction

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::curr_req_lcrd_count

Current L-credit count observed on TX REQ VC

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::curr_txrsp_lcrd_count

Current L-credit count observed on TX RSP VC

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::curr_txdat_lcrd_count

Current L-credit count observed on TX DAT VC

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::curr_snp_lcrd_count

Current L-credit count observed on RX SNP VC

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::curr_rxrsp_lcrd_count

Current L-credit count observed on RX RSP VC

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_rn_if::curr_rxdat_lcrd_count

Current L-credit count observed on RX DAT VC

string attribute
svt_chi_rn_if::full_name

Full path to this interface or module instance

function void
svt_chi_sn_if::set_enable_signal_log

( )

support for signal logging.

function string
svt_chi_sn_if::get_full_name

( )

Simple method for getting the full path for an interface or module.

interface svt_chi_sn_if signal
input logic clk

interface svt_chi_sn_if signal
input logic resetn

bit attribute
svt_chi_sn_if::is_active

logic attribute
svt_chi_sn_if::TXSACTIVE

logic attribute
svt_chi_sn_if::RXSACTIVE

logic attribute
svt_chi_sn_if::TXLINKACTIVEREQ

logic attribute
svt_chi_sn_if::TXLINKACTIVEACK

logic attribute
svt_chi_sn_if::RXLINKACTIVEREQ

logic attribute
svt_chi_sn_if::RXLINKACTIVEACK

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0] attribute
svt_chi_sn_if::RXREQFLITPEND

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0] attribute
svt_chi_sn_if::RXREQFLITV

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][SVT_CHI_MAX_REQ_FLIT_WIDTH-1:0] attribute
svt_chi_sn_if::RXREQFLIT

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0] attribute
svt_chi_sn_if::RXREQLCRDV

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_sn_if::TXRSPFLITPEND

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_sn_if::TXRSPFLITV

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0] attribute
svt_chi_sn_if::TXRSPFLIT

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_sn_if::TXRSPLCRDV

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_sn_if::TXDATFLITPEND

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_sn_if::TXDATFLITV

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0] attribute
svt_chi_sn_if::TXDATFLIT

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_sn_if::TXDATLCRDV

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_sn_if::RXDATFLITPEND

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_sn_if::RXDATFLITV

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0] attribute
svt_chi_sn_if::RXDATFLIT

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_sn_if::RXDATLCRDV

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_sn_if::req_obj_num

Object number of the transaction currently observed on REQ VC

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_sn_if::rx_dat_obj_num

Object number of the transaction currently observed on RX DAT VC

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_sn_if::tx_rsp_obj_num

Object number of the transaction currently observed on TX RSP VC

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_sn_if::tx_dat_obj_num

Object number of the transaction currently observed on TX DAT VC

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_sn_if::curr_txdat_lcrd_count

Current L-credit count observed on TX DAT VC

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_sn_if::curr_txrsp_lcrd_count

Current L-credit count observed on TX RSP VC

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_sn_if::curr_req_lcrd_count

Current L-credit count observed on RX REQ VC

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_sn_if::curr_rxdat_lcrd_count

Current L-credit count observed on RX DAT VC

string attribute
svt_chi_sn_if::full_name

Full path to this interface or module instance

function void
svt_chi_ic_rn_if::set_enable_signal_log

( )

support for signal logging.

function string
svt_chi_ic_rn_if::get_full_name

( )

Simple method for getting the full path for an interface or module.

interface svt_chi_ic_rn_if signal
input logic clk

interface svt_chi_ic_rn_if signal
input logic resetn

bit attribute
svt_chi_ic_rn_if::is_active

logic attribute
svt_chi_ic_rn_if::RXSACTIVE

logic attribute
svt_chi_ic_rn_if::TXSACTIVE

logic attribute
svt_chi_ic_rn_if::RXLINKACTIVEREQ

logic attribute
svt_chi_ic_rn_if::RXLINKACTIVEACK

logic attribute
svt_chi_ic_rn_if::TXLINKACTIVEREQ

logic attribute
svt_chi_ic_rn_if::TXLINKACTIVEACK

logic attribute
svt_chi_ic_rn_if::SYSCOREQ

logic attribute
svt_chi_ic_rn_if::SYSCOACK

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXREQFLITPEND

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXREQFLITV

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][SVT_CHI_MAX_REQ_FLIT_WIDTH-1:0] attribute
svt_chi_ic_rn_if::RXREQFLIT

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXREQLCRDV

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXRSPFLITPEND

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXRSPFLITV

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0] attribute
svt_chi_ic_rn_if::TXRSPFLIT

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXRSPLCRDV

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXDATFLITPEND

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXDATFLITV

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0] attribute
svt_chi_ic_rn_if::TXDATFLIT

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXDATLCRDV

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXSNPFLITPEND

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXSNPFLITV

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][SVT_CHI_MAX_SNP_FLIT_WIDTH-1:0] attribute
svt_chi_ic_rn_if::TXSNPFLIT

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::TXSNPLCRDV

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXRSPFLITPEND

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXRSPFLITV

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0] attribute
svt_chi_ic_rn_if::RXRSPFLIT

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXRSPLCRDV

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXDATFLITPEND

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXDATFLITV

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0] attribute
svt_chi_ic_rn_if::RXDATFLIT

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_ic_rn_if::RXDATLCRDV

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::req_obj_num

Object number of the transaction currently observed on REQ VC

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::rx_rsp_obj_num

Object number of the transaction currently observed on RX RSP VC

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::rx_dat_obj_num

Object number of the transaction currently observed on RX DAT VC

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::tx_rsp_obj_num

Object number of the transaction currently observed on TX RSP VC

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::tx_dat_obj_num

Object number of the transaction currently observed on TX DAT VC

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::snp_req_obj_num

Object number of the transaction currently observed on SNP VC

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::snp_dat_obj_num

Object number of the transaction currently observed on TX DAT VC, if it corresponds to a snoop transaction

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::snp_rsp_obj_num

Object number of the transaction currently observed on TX RSP VC, if it corresponds to a snoop transaction

logic [(SVT_CHI_RN_MAX_RXSNP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::curr_snp_lcrd_count

Current L-credit count observed on TX SNP VC

logic [(SVT_CHI_RN_MAX_RXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::curr_txrsp_lcrd_count

Current L-credit count observed on TX RSP VC

logic [(SVT_CHI_RN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::curr_txdat_lcrd_count

Current L-credit count observed on TX DAT VC

logic [(SVT_CHI_RN_MAX_TXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::curr_req_lcrd_count

Current L-credit count observed on RX REQ VC

logic [(SVT_CHI_RN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::curr_rxrsp_lcrd_count

Current L-credit count observed on RX RSP VC

logic [(SVT_CHI_RN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_rn_if::curr_rxdat_lcrd_count

Current L-credit count observed on RX DAT VC

string attribute
svt_chi_ic_rn_if::full_name

Full path to this interface or module instance

function void
svt_chi_ic_sn_if::set_enable_signal_log

( )

support for signal logging.

function string
svt_chi_ic_sn_if::get_full_name

( )

Simple method for getting the full path for an interface or module.

interface svt_chi_ic_sn_if signal
input logic clk

interface svt_chi_ic_sn_if signal
input logic resetn

bit attribute
svt_chi_ic_sn_if::is_active

logic attribute
svt_chi_ic_sn_if::TXSACTIVE

logic attribute
svt_chi_ic_sn_if::RXSACTIVE

logic attribute
svt_chi_ic_sn_if::RXLINKACTIVEREQ

logic attribute
svt_chi_ic_sn_if::RXLINKACTIVEACK

logic attribute
svt_chi_ic_sn_if::TXLINKACTIVEREQ

logic attribute
svt_chi_ic_sn_if::TXLINKACTIVEACK

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::TXREQFLITPEND

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::TXREQFLITV

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][SVT_CHI_MAX_REQ_FLIT_WIDTH-1:0] attribute
svt_chi_ic_sn_if::TXREQFLIT

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::TXREQLCRDV

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::RXRSPFLITPEND

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::RXRSPFLITV

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][SVT_CHI_MAX_RSP_FLIT_WIDTH-1:0] attribute
svt_chi_ic_sn_if::RXRSPFLIT

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::RXRSPLCRDV

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::RXDATFLITPEND

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::RXDATFLITV

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0] attribute
svt_chi_ic_sn_if::RXDATFLIT

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::RXDATLCRDV

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::TXDATFLITPEND

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::TXDATFLITV

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][SVT_CHI_MAX_DAT_FLIT_WIDTH-1:0] attribute
svt_chi_ic_sn_if::TXDATFLIT

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0] attribute
svt_chi_ic_sn_if::TXDATLCRDV

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::req_obj_num

Object number of the transaction currently observed on REQ VC

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::rx_rsp_obj_num

Object number of the transaction currently observed on RX RSP VC

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::rx_dat_obj_num

Object number of the transaction currently observed on RX DAT VC

logic [(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::tx_rsp_obj_num

Object number of the transaction currently observed on TX RSP VC

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::tx_dat_obj_num

Object number of the transaction currently observed on TX DAT VC

logic [(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::snp_req_obj_num

Object number of the transaction currently observed on SNP VC

logic [(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::snp_dat_obj_num

Object number of the transaction currently observed on TX DAT VC, if it corresponds to a snoop transaction

logic [(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::snp_rsp_obj_num

Object number of the transaction currently observed on TX RSP VC, if it corresponds to a snoop transaction

logic [(SVT_CHI_SN_MAX_RXREQ_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::curr_req_lcrd_count

Current L-credit count observed on TX REQ VC

logic [(SVT_CHI_SN_MAX_RXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::curr_txdat_lcrd_count

Current L-credit count observed on TX DAT VC

logic [(SVT_CHI_SN_MAX_TXRSP_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::curr_rxrsp_lcrd_count

Current L-credit count observed on RX RSP VC

logic [(SVT_CHI_SN_MAX_TXDAT_CHANNELS-1):0][(SVT_CHI_DEBUG_PORT_WIDTH-1):0] attribute
svt_chi_ic_sn_if::curr_rxdat_lcrd_count

Current L-credit count observed on RX DAT VC

string attribute
svt_chi_ic_sn_if::full_name

Full path to this interface or module instance

function void
svt_chi_if::set_enable_signal_log

( )

support for signal logging.

function string
svt_chi_if::get_full_name

( )

Simple method for getting the full path for an interface or module.

interface svt_chi_if signal
input logic clk

interface svt_chi_if signal
input logic resetn

svt_chi_rn_if attribute
svt_chi_if::rn_if

svt_chi_ic_rn_if attribute
svt_chi_if::ic_rn_if

svt_chi_sn_if attribute
svt_chi_if::sn_if

svt_chi_ic_sn_if attribute
svt_chi_if::ic_sn_if

string attribute
svt_chi_if::full_name

Full path to this interface or module instance

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AMBA CHI-G SVT UVM Documentation - Interfaces Reference

Interface Definition Documentation