VIP Smartsearch

X
  • VIP Smartsearch is a framework that supports search within VIP reference documents using query in natural language. It facilitates reordering of search results and keeps record of user’s decision for the ordering of result display and applies that in search of same query on subsequent usage.

  • How to download VIP smartsearch?

    1. Get VIP Smartsearch (Available as a seperate run file).
    2. Set environment variable 
      DESIGNWARE_HOME
      to required designware home location where VIP Smartsearch should be downloaded.
    3. Run 
      vip_smartsearch_<version>.run
      file.
      VIP Smartsearch will be downloaded to the location 
      $DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>

  • How to install VIP Smartsearch?

    Please refer to the file 
    VIP_Smartsearch_installation_and_usage_guide.pdf
    in 
    $DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>
    for installation steps.

  • Customer Support

    For more details about VIP smartsearch tool, contact support_center@synopsys.com.
    Mention your queries along with below details and send email to above email id.
    Product: Verification IP
    Sub Product: <vip_title>
    Tool: VIP Smartsearch
13 August 2024, Copyright © 2024 Synopsys, Inc.

AHB SVT UVM Documentation - Sequence Page

Comprehensive Inheritance diagram for sequence classes:

Summary of Sequences defined in AHB SVT UVM Documentation:

Product Base Group
amba_svt Ungrouped Sequences

Product: amba_svt - Sequence Details:

Sequence Group Sequences Sequences Description
default svt_ahb_master_transaction_base_sequence This sequence raises/drops objections in the pre/post_body so that root sequences raise objections but subsequences do not. All other svt_ahb_master sequences in the collection extend from this base sequence. sequence_length
Number of Transactions in a sequence.

seq_xact_type
Parameter that controls the type of transaction that will be generated

seq_burst_type
Parameter that controls the burst_type of transaction that will be generated

seq_lock
Parameter that controls lock bit of the transaction

seq_num_busy_cycles
Parameter that controls the num_busy_cycles of the transaction

seq_wait_for_xact_ended
Parameter that controls waiting of transaction to end

slv_num
Slave number used to constrain it

default svt_ahb_master_transaction_alternate_write_read_sequence This sequence generates alternate write and read transaction. All other transaction fields are randomized. The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_busy_write_read_sequence This sequence generates a sequence of write transactions, followed by a sequence of read transactions with busy cycles inserted for every beat of the burst. All other transaction fields are randomized.The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_distributed_write_read_sequence This sequence generates a sequence of write transactions, followed by a sequence of read transactions with distribution on the following fields:

Number of busy cycles lock or normal transfer length of undefined length incrementing burst

All other transaction fields are randomized. The sequence waits for each transaction to complete, before sending the next transaction.

 sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_fixed_len_write_read_hsize_sequence This sequence generates alternate write and read transaction including: SINGLE and fixed length Burst types Transfer sizes including BYTE,HALF-WORD,FULL-WORD types The remaining transaction fields are randomized. The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_idle_sequence This sequence generates a sequence of idle transactions.All other transaction fields are randomized.The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_locked_write_read_sequence This sequence performs the following: A LOCKED WRITE transaction A NORMAL READ transaction A NORMAL WRITE transaction A LOCKED READ transaction The remaining transaction fields are randomized. The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_no_idle_write_read_sequence This sequence generates back-to-back write and read transaction with zero idle cycles between transactions.The remaining transaction fields are randomized. The sequence does not wait for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_random_sequence This sequence generates random master transactions. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_read_sequence This sequence generates a sequence of read transactions.All other transaction fields are randomized.The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_read_xact_sequence This sequence generates a single random read transaction. addr
Address to be written

default svt_ahb_master_transaction_write_read_sequence This sequence generates a sequence of write transactions, followed by a sequence of read transactions. All other transaction fields are randomized. The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_write_sequence This sequence generates a sequence of write transactions.All other transaction fields are randomized.The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_master_transaction_write_xact_sequence This sequence generates a single random write transaction. addr
Address to be written

data
Data to be written

default svt_ahb_transaction_random_write_or_read_sequence This sequence generates a sequence of write or read transactions with busy cycles inserted to a value controlled by user for every beat of the burst. For INCR burst type num_incr_beats is controlled by user. All other transaction fields are randomized.The sequence waits for each transaction to complete, before sending the next transaction. --
default svt_ahb5_excl_master_random_incr_transaction_read_write_sequence This sequence generates a sequence of AHB5 exclusive or normal transactions randomly to check the exclusive transaction flow. This sequence generate exclusives in INCR burst type. Addresses in one sequence is the same and the exclusive transfer type, xact_type is changed. All other transaction fields are randomized. sequence_length
Number of Transactions in a sequence.

default svt_ahb5_excl_master_transaction_read_write_sequence This sequence generates a sequence of AHB5 exclusive read transactions, followed by a sequence of write transactions. All other transaction fields are randomized.The sequence waits for each transaction to complete, before sending the next transaction. sequence_length
Number of Transactions in a sequence.

default svt_ahb_slave_transaction_base_sequence This sequence raises/drops objections in the pre/post_body so that root sequences raise objections but subsequences do not. All other svt_ahb_slave sequences in the collection extend from this base sequence. --
default svt_ahb_slave_controlled_response_sequence Abstract: class svt_ahb_slave_controlled_response_sequence defines a sequence class that provides slave response to the Slave agent present in the System agent. The sequence receives a response object of type svt_ahb_slave_transaction from slave sequencer. The sequence class then randomizes the response with constraints and provides it to the slave driver within the slave agent. The sequence also instantiates the slave built-in memory, and writes into or reads from the slave memory. --
default svt_ahb_slave_controlled_split_response_sequence Abstract: class svt_ahb_slave_controlled_split_response_sequence defines a sequence class that provides slave response to the Slave agent present in the System agent. The sequence receives a response object of type svt_ahb_slave_transaction from slave sequencer. The sequence class then randomizes the response with constraints and provides it to the slave driver within the slave agent. The sequence also instantiates the slave built-in memory, and writes into or reads from the slave memory. --
default svt_ahb_slave_memory_response_sequence Abstract: Class svt_ahb_slave_memory_response_sequence defines a sequence class that provides slave response to the Slave agent present in the System agent. The sequence receives a response object of type svt_ahb_slave_transaction from slave sequencer. The sequence class then randomizes the response with OKAY response and provides it to the slave driver within the slave agent. The sequence also instantiates the slave built-in memory, and writes into or reads from the slave memory.

Execution phase: main_phase Sequencer: Slave agent sequencer

 --
default svt_ahb_slave_tlm_response_sequence This sequence is used as Reactive seuqnce which translates slave transactions into corresponding AMBA-PV extended TLM Generic Payload Transactions and forwards it via the resp_socket socket for fulfillment by an AMBA-PV Slave. The response returned by the socket is then sent back to the driver.

Automatically configured as the run_phase default sequence for every instance of the svt_ahb_slave_sequencer if the use_pv_socket property in the port configuration is TRUE

 --
default svt_ahb_slave_transaction_distributed_random_sequence This sequence generates distributed random svt_ahb_slave transactions. --
default svt_ahb_slave_transaction_error_sequence This sequence generates ERROR responses. --
default svt_ahb_slave_transaction_memory_sequence This sequence gets the slave response sequence item from slave sequencer. The slave response is then randomized based on certain weights. User can modify these weights such that the sum of all the weights is 100. Also the sequence provides additional level of control interms of maximum number of non-OKAY responses to be allowed on per full AHB transaction. The sequence uses the built-in slave memory. For read transactions, it reads the data from the slave memory. For write transactions, it writes the data into slave memory. The randomized response is then provided to the slave driver.

This sequence runs forever, and so is not registered with the slave sequence library.

 --
default svt_ahb_slave_transaction_okay_sequence This sequence generates OKAY responses. --
default svt_ahb_slave_transaction_random_sequence This sequence generates random svt_ahb_slave transactions. --
default svt_ahb_slave_transaction_retry_sequence This sequence generates RETRY responses. --
default svt_ahb_slave_transaction_split_sequence This sequence generates SPLIT responses. --
default svt_ahb_system_base_sequence This sequence creates a reporter reference initiating_master_index_0
Active Participating Master index

active_participating_slave_index_0
Active Participating Slave index

participating_slave_index_0
Participating Slave index

default svt_ahb_arb_abort_on_error_resp_virtual_sequence #- Program a master VIP to drive write or read burst with 'n' number of transfers on to the bus.
#- Program a slave VIP to respond with ERROR response during any transfer.
#- Program the master VIP to abort remaining transfers when ERROR response is received
and shouldn't rebuild the transcation.
#- Check that AHB bus doesn't continues the remaining transfers in the burst.
#- Initiate the above stimulus from all Master VIPs sequentially towards all the
Slaves connected to the BUS.
.		 --
default svt_ahb_arb_fixed_length_hbusreq_virtual_sequence #- Program a master VIP to drive write or read burst of fixed length on to the bus and
routed to a slave.
#- Check AHB bus should behave correctly for fixed length bursts when master
de-assert hbusreq once it is granted the bus and burst should complete succesfully.
#- Initiate the above stimulus from all Master VIPs sequentially towards all the
Slaves.
.		 --
default svt_ahb_arb_narrow_transfer_virtual_sequence #- Program the Master VIP to drive write or read burst with narrow transfers on the
bus.
#- Check AHB bus arbiter forwards narrow transfers with appropriate byte lanes.
#- Initiate the above stimulus from all Master VIPs sequentially towards all the
Slaves.
.		 --
default svt_ahb_arb_reset_original_xact_in_progress_virtual_sequence #- Program the Master VIP to drive write or read burst on the bus.
#- AHB bus forwards this burst to a slave.
#- Check AHB bus should response properly when reset was inserted in the original
transaction in progress.
#- Initiate the above stimulus from all Master VIPs sequentially towards all the
Slaves.
.		 --
default svt_ahb_arb_undefined_length_hbusreq_virtual_sequence #- Program the master VIP to drive write or read burst of undefined length on to the bus
and routed to the slave.
#- Check AHB bus should behave correctly for undefined length bursts, the master
should continue to assert the request until it has started the last transfer.
#- Initiate the above stimulus from all Master VIPs sequentially towards all the
Slaves.
.		 --
default svt_ahb_busy_transfer_virtual_sequence #- Program a master VIP to drive write or read burst with transfer type of BUSY to be
inserted in between the transfers.
#- Check AHB bus forwards OKAY response to BUSY transfers, when a master sends write
or read burst with BUSY transfer type.
#- Initiate the above stimulus from all Master VIPs sequentially towards all the
Slaves.
.		 --
default svt_ahb_idle_transfer_virtual_sequence #- Program the Master VIP to drive idle burst on the bus.
#- AHB bus forwards this transfer to a slave.
#- Initiate the above stimulus from all Master VIPs sequentially towards all the
Slaves.
.		 --
default svt_ahb_locked_diff_master_same_slave_rd_wr_virtual_sequence #- Program the two master VIP to drive write or read burst with one always
driving locked transfers the other driving either locked or unlocked transfers
routed to same slave.
#- Check AHB bus should behave correctly for mixtures of locked and normal bursts
when transfer driven by two masters to the slave.
.		 initiating_master_index_1
Represents the Second Active Participating Master from which the sequence will be initiated.

default svt_ahb_lock_fixed_length_virtual_sequence #- Program the master VIP to drive write or read locked transaction of fixed length
routed to the slave.
#- Check AHB bus should behave correctly for locked.
#- Initiate the above stimulus from all Master VIPs sequentially towards all the
Slaves.
.		 --
default svt_ahb_lock_split_retry_resp_same_master_same_slave_virtual_sequence #- Program a master VIP to drive locked or unlocked burst on to the bus
and routed to a slave.
#- Program above selected slave VIP such that it should response with RETRY or
SPLIT for any transfer of the burst.
#- Check AHB bus arbiter behaves properly when RETRY or SPLIT response was
received for locked or unlocked burst from same slave.
#- For unlocked bursts, Check AHB bus arbiter will grant to higher-priority master
when received RETRY response or another master when received SPLIT response
from same slave and finishes with OKAY transfer response when re-attempt it.
#- For locked bursts, Check AHB bus arbiter should give grant access to dummy master
when received SPLIT response or higher-priority master when received RETRY response.
.		 --
default svt_ahb_retry_resp_reached_max_virtual_sequence #- Program a master VIP to drive write or read burst on the bus.
#- AHB bus forwards this burst to a slave.
#- Check AHB bus should behave correctly when maximum number of rebuild attempts
on RETRY response was reached for a given transaction and master aborts the
transaction under such condition.
.		 --
default svt_ahb_split_resp_all_master_diff_slave_virtual_sequence #- Program a master VIP to drive write or read burst on the bus.
#- AHB bus forwards this burst to a slave.
#- Simultaneously Program all other masters VIP to drive write or read burst on the
bus and forwards the burst to different slaves.
#- Program above selected slaves VIP such that it should response with SPLIT for any
transfer of the burst and assert HSPILT signal after certain clock cycles.
#- Check the above masters are not continuing the transfers after receving SPLIT
response.
#- Make sure all masters have received SPLIT transfer response.
#- Check AHB bus arbiter will grant to the default master.
#- After certain clock cycles, Check AHB bus arbiter will grant the particular master
based on HSPLITx signals,so it can re-attempt the transfer and finishes with OKAY
transfer response.
.		 --
default svt_ahb_split_resp_all_master_same_slave_virtual_sequence #- Program a master VIP to drive write or read burst on the bus.
#- AHB bus forwards this burst to a slave.
#- Simultaneously Program all other masters VIP to drive write or read burst on the
bus and forwards the burst to above selected slave.
#- Program above selected slave VIP such that it should response with SPLIT for any
transfer of each master burst and assert HSPILT signal after certain clock cycles.
#- Check the above masters are not continuing the transfers after receving SPLIT
response.
#- Make sure all masters have received SPLIT transfer response.
#- Check AHB bus arbiter will grant to the default master.
#- After certain clock cycles, Check AHB bus arbiter will grant the particular master
based on HSPLITx signals,so it can re-attempt the transfer and finishes with OKAY
transfer response.
.		 --
default svt_ahb_split_retry_resp_diff_master_diff_slave_virtual_sequence #- Program a master VIP to drive write or read burst on the bus.
#- AHB bus forwards this burst to a slave.
#- Simultaneously Program another master VIP to drive write or read burst on the
bus and forwards the burst to another slave.
#- Program above two selected slaves VIP such that it should response with RETRY or
SPLIT for any transfer of the burst.
#- Check AHB bus arbiter behaves properly when RETRY or SPLIT response was
received from different slaves.
#- Check AHB bus arbiter will grant to higher-priority master when received RETRY
response or another master when received SPLIT response from different slaves
and finishes with OKAY transfer response when re-attempt it.
.		 initiating_master_index_1
Represents the Second Active Participating Master from which the sequence will be initiated.

selected_slv_1
Represents the Randomly selected Second Slave.

default svt_ahb_system_burst_transfer_virtual_sequence #- Program the Master VIP to drive write or read transaction.
#- Program the Slave VIP to assert HREADY signal low for few cycles
during transfers and then accordingly assert HREADY to 1.
#- Check the bus Master holds the data stable throughout the extended
cycles of transfer for which HREADY was de-asserted.
#- Check the bus forwards the appropriate OKAY response with wait state to the master.
.		 --
default svt_ahb_system_ebt_virtual_sequence #- Program the Master VIP to drive write or read transaction.
#- Program the bus for EBT during any transfer of the transaction.
#- Program the Master VIP to regains the access of bus.
#- Once it gains the bus, Program the Master to rebuild the transcation
#- with burst type as INCR or SINGLE.
#- Initiate the above stimulus from all Master VIPs sequentially towards all
the Slaves connected to the Bus.
.		 --
default svt_ahb_system_random_sequence This sequence allows unconstrained random traffic for all ports --
default svt_ahb_v6_unaligned_transfer_virtual_sequence Applicable for AHB_V6 enabled AHB systems
In AHBv6, capability to drive unaligned transfers is added.
This sequence is used to implement following.
#- Program a master VIP to drive unaligned bursts with unaligned address on to the bus
and routed to a slave.
#- Program the sequence to generate an unaligned address based on the burst size of the transfer
#- Check if the data values are correctly driven on the bus
#- Check if the data values are correctly sampled by slave and passive components
.		 --
default svt_ahb_tlm_generic_payload_sequence This sequence generates UVM TLM Generic Payload Transactions. A WRITE transaction is followed by a READ transaction to the same address. At the end of the READ transaction we check that the contents of the READ transaction are same as the WRITE transaction sequence_length
Number of Transactions in a sequence.



13 August 2024, Copyright © 2024 Synopsys, Inc.