VIP Smartsearch

X
  • VIP Smartsearch is a framework that supports search within VIP reference documents using query in natural language. It facilitates reordering of search results and keeps record of user’s decision for the ordering of result display and applies that in search of same query on subsequent usage.
  • How to download VIP smartsearch?

    1. Get VIP Smartsearch (Available as a seperate run file).
    2. Set environment variable
      DESIGNWARE_HOME
      to required designware home location where VIP Smartsearch should be downloaded.
    3. Run
      vip_smartsearch_<version>.run
      file.
      VIP Smartsearch will be downloaded to the location
      $DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>
  • How to install VIP Smartsearch?

    Please refer to the file
    VIP_Smartsearch_installation_and_usage_guide.pdf
    in
    $DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>
    for installation steps.
  • Customer Support

    For more details about VIP smartsearch tool, contact support_center@synopsys.com.
    Mention your queries along with below details and send email to above email id.
    Product: Verification IP
    Sub Product: <vip_title>
    Tool: VIP Smartsearch

AMBA CHI-C SVT UVM Documentation main page

Version W-2024.09

NOTE: Based on the AMBA Progressive Terminology updates, you must interpret the term Master as Manager, and Slave as Subordinate in the VIP documentation and messages.

Introduction
This is the Class Reference Manual of Synopsys CHI SVT VIP that supports 'AMBA5 CHI Issue C Specification'.

The AMBA VIP Release Notes are installed at:

The CHI VIP UVM User Guide is installed at:

The CHI VIP UVM FAQ document is installed at:

The Synopsys VIP for CHI is a suite of advanced verification components and data objects based on SystemVerilog UVM-compliant technology. This on-line help contains information about the classes, functions, and member variables. It shows class hierarchy and contents and it provides links you can use to navigate to more details. Below is the summary of the components and the user interface of the Synopsys CHI VIP.

CHI VIP Components

CHI VIP User Interface
Configuration Objects:
Configuration data objects convey the system level and port level testbench configuration. The configuration data objects contain built-in constraints, which come into effect when the configuration objects are randomized. If the configuration needs to be changed later, it can be done through reconfigure() method of the master, slave, interconnect or system components. The CHI VIP defines following configuration classes:

Transaction Objects:
Transaction objects, which are extended from the uvm_transaction base class, define a unit of CHI protocol information that is passed across the bus. The attributes of transaction objects are public and are accessed directly for setting and getting values. Most transaction attributes can be randomized. The transaction object can represent the desired activity to be simulated on the bus, or the actual bus activity that was monitored. CHI VIP defines following transaction classes:

Analysis port:
The port monitor in all the agents provide an analysis port. At the end of the CHI transaction, the protocol layer monitor within the RN & SN agents provides the completed svt_chi_rn_transaction & svt_chi_sn_transaction object respectively, from its analysis port. At the end of the CHI transaction, link layer monitor within the RN & SN agents provides the completed svt_chi_flit from its analysis port.
The analysis port used by port monitor within the agents is:

Callbacks:
Callbacks are an access mechanism that enable the insertion of user-defined code and allow access to objects for scoreboarding and functional coverage. Each of the monitor component is associated with a callback class that contains a set of callback methods. CHI VIP provides following callback classes.

Interfaces and modports:
SystemVerilog models signal connections using interfaces and modports. Interfaces define the set of signals which make up a port connection. Modports define collection of signals for a given port, the direction of the signals, and the clock with respect to which these signals are driven and sampled. CHI VIP provides below interfaces:

Functional Coverage:
For a complete list of coverage groups supported by the CHI VIP, please click on the "Covergroups" tab in this class reference documentation.

Protocol Checks:
For a complete list of protocol checks supported by the CHI VIP, please click on the "Protocol Checks" tab in this class reference documentation.

Sequence collection:
The CHI VIP provides a collection of CHI RN & SN sequences, and AXI master & slave sequences. These sequences can be registered with the sequencers within the respective agents, to generate different types of scenarios.

For a complete list of Sequences supported by the CHI VIP, please click on the "Sequences" tab in this class reference documentation.

Debug features:

CHI system level performance metrics:
CHI system ENV contains shared system status object (svt_chi_system_env :: shared_system_status) that contains the system level performance metrics captured by CHI system monitor. Note that the performance metric tracking can be enable through the attribute svt_chi_system_configuration :: perf_tracking_enable.
Following are the details of the shared system status object and it's related attributes: