VIP Smartsearch

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  • VIP Smartsearch is a framework that supports search within VIP reference documents using query in natural language. It facilitates reordering of search results and keeps record of user’s decision for the ordering of result display and applies that in search of same query on subsequent usage.

  • How to download VIP smartsearch?

    1. Get VIP Smartsearch (Available as a seperate run file).
    2. Set environment variable 
      DESIGNWARE_HOME
      to required designware home location where VIP Smartsearch should be downloaded.
    3. Run 
      vip_smartsearch_<version>.run
      file.
      VIP Smartsearch will be downloaded to the location 
      $DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>

  • How to install VIP Smartsearch?

    Please refer to the file 
    VIP_Smartsearch_installation_and_usage_guide.pdf
    in 
    $DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>
    for installation steps.

  • Customer Support

    For more details about VIP smartsearch tool, contact support_center@synopsys.com.
    Mention your queries along with below details and send email to above email id.
    Product: Verification IP
    Sub Product: <vip_title>
    Tool: VIP Smartsearch
13 August 2024, Copyright © 2024 Synopsys, Inc.

AXI SVT UVM Documentation - Other Class List

Here are the Other classes with brief descriptions:
svt_axi_reg_adapter The svt_axi_reg_adapter encapsulates the master reg transaction class, This class contains the uvm_sequence_item reg2bus and uvm_sequence_item bus2reg implementation for AXI
svt_axi_cov_data Description-Unavailable
svt_axi_locked_followed_by_excl_xact_sequence This Class represents the following pattern sequence, which needs to be scanned within the AXI Locked READ transaction followed by Exclusive transaction with response.
LOCKED READ transaction followed by EXCLUSIVE transaction
svt_axi_barrier_pair_wr_after_rd_pattern_sequence This Class represents the following pattern sequence, which needs to be scanned within the AXI Barrier transactions.
WRITEBARRIER followed by READBARRIER
svt_axi_barrier_pair_rd_after_wr_pattern_sequence This Class represents the following pattern sequence, which needs to be scanned within the AXI Barrier transactions.
READBARRIER followed by WRITEBARRIER
svt_axi_toggle_bit_cov Coverage class declaration consists of covergroup for single bit coverpoint variable. For variable width signal instantiated as per the individual bit index.
svt_axi_cov Class containing the coverage groups
svt_axi_exclusive_monitor Description-Unavailable
svt_axi_sysco_coherency_disconnect_state Class implementing the COHERENCY_DISCONNECT state.
svt_axi_sysco_coherency_enabled_state Class implementing the COHERENCY_ENABLED state.
svt_axi_sysco_coherency_connect_state Class implementing the COHERENCY_CONNECT state.
svt_axi_sysco_coherency_disabled_state Class implementing the COHERENCY_DISABLED state.
svt_axi_sysco_interface_fsm Class implementing the SYSCO Interface state machine.
svt_axi_passive_cache This class is used to model a single cache.
svt_uvm_pkg Description-Unavailable
uvm_pkg Description-Unavailable
uvm_pkg Description-Unavailable
svt_axi_callback_data Description-Unavailable
svt_axi_gp_utils Utility class with a collection of routines to assist with Generic Protocol transaction conversions.
svt_axi_fifo_mem This class is used to model a single FIFO.
svt_axi_cache This class is used to model a single cache.
svt_axi_cache_line This class is used to represent a single cache line. It is intended to be used to create a sparse array of stored cache line data, with each element of the array representing a full cache line in the cache. The object is initilized with, and stores the information about the index, the address associated with this cache line, the corresponding data and the status of the cache line.
svt_axi_system_monitor_exclusive_sequence_transaction_activity_callback_data The data object of this class will be used as argument for callback in AXI system monitor to set the expectation for the excluisve store transaction All the required arguments are the members of this class. Any additional arguments if required can be added to this class.
svt_axi_slave_region_range Defines a range of address region identified by a starting address(start_addr) and end address(end_addr).
svt_axi_slave_addr_range Defines a range of address region identified by a starting address(start_addr) and end address(end_addr).
svt_axi_system_domain_item Defines a system domain map. Refer Section C 1.6.1 on Domains. Applicable when svt_axi_port_configuration :: AXI_ACE is used in any of the ports. Each inner domain/outer domain/non-shareable domain/system shareable domain is represented by an instance of this class. There can be multiple address ranges for a single domain, but no address range should overlap. For example if M0 and M1 are in the inner domain and share the addresses (0x00-0xFF and 0x200-0x2FF), the following apply: domain_type = svt_axi_system_domain_item :: INNERSHAREABLE start_addr[0] = 0x00 end_addr[0] = 0xFF start_addr[1] = 0x200 end_addr[1] = 0x2FF domain_idx = master_ports[] = {0,1}; The following utility methods are provided in svt_axi_system_configuration to define and set the above variables svt_axi_system_configuration :: create_new_domain; svt_axi_system_configuration :: set_addr_for_domain;
svt_amba_fifo_rate_control Utility class which may be used by agents to model a FIFO based resource class to control the rate at which transactions are sent from a component
svt_amba_addr_mapper Description-Unavailable
svt_amba_pv_extension TLM 2.0 Generic Payload extension class used to model AXI transactions using a LT coding style. It corresponds to the ARM amba_pv_extension class. See the ARM AMBA-PV Extensions to OSCI TLM 2.0 Reference Manual for detailed documentation.
svt_amba_pv Container class for enum declarations
13 August 2024, Copyright © 2024 Synopsys, Inc.