VIP Smartsearch

VIP Smartsearch is a framework that supports search within VIP reference documents using query in natural language. It facilitates reordering of search results and keeps record of user’s decision for the ordering of result display and applies that in search of same query on subsequent usage.
How to download VIP smartsearch?
1. Get VIP Smartsearch (Available as a seperate run file).
2. Set environment variable
```
DESIGNWARE_HOME
```
  to required designware home location where VIP Smartsearch should be downloaded.
3. Run
```
vip_smartsearch_<version>.run
```
  file.
  VIP Smartsearch will be downloaded to the location
```
$DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>
```

How to install VIP Smartsearch?

Please refer to the file

VIP_Smartsearch_installation_and_usage_guide.pdf

$DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>

for installation steps.

Customer Support
For more details about VIP smartsearch tool, contact support_center@synopsys.com.
Mention your queries along with below details and send email to above email id.
Product: Verification IP
Sub Product: <vip_title>
Tool: VIP Smartsearch

DTI SVT UVM Documentation - CoverGroup Reference

Summary of Coverage defined in DTI SVT UVM Documentation:

Product Base	Group
amba_svt	DTI_PORT_MON_COV * The Covergroups under this group capture all the transaction control information when interface_type is set to DTI

Product Base

Group

amba_svt

DTI_PORT_MON_COV

* The Covergroups under this group capture all the transaction control information when interface_type is set to DTI

Group	Covergroup	Coverpoints	Bins	Cross Coverage	Description
DTI_PORT_MON_COV	ats_inv_req_dti_operation	ats_operation	ats_operation:ATCI_NOPASID, ATCI_PASID_GLOBAL, ATCI_PASID, ATS_RESERVED_VAL	--	Covergroup : ats_inv_req_dti_operation
DTI_PORT_MON_COV	ats_inv_req_dti_sid	ats_stream_id		--	Covergroup : ats_inv_req_dti_sid
DTI_PORT_MON_COV	ats_inv_req_dti_ssid	ats_substream_id		--	Covergroup : ats_inv_req_dti_ssid
DTI_PORT_MON_COV	ats_inv_req_dti_va_ipa	ats_va_ipa		--	Covergroup : inv_req_dti_ats_va_ipa
DTI_PORT_MON_COV	inv_req_cross_op_asid_inc_aset1	operation asid inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_asid_inc_aset1	Covergroup : inv_req_cross_op_asid_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_op_inc_aset1	operation inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_inc_aset1	Covergroup : inv_req_cross_op_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_op_sid_range	operation stream_id sid_vmid_range	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_sid_range	Covergroup : inv_req_cross_op_sid_range
DTI_PORT_MON_COV	inv_req_cross_op_sid_ssid	operation stream_id substream_id	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_sid_ssid	Covergroup : inv_req_cross_op_sid_ssid
DTI_PORT_MON_COV	inv_req_cross_op_va_asid_inc_aset1	operation addr asid inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_va_asid_inc_aset1	Covergroup : inv_req_cross_op_va_asid_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_op_va_inc_aset1	operation addr inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_inc_aset1	Covergroup : inv_req_cross_op_va_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_op_vmid_asid_range_inc_aset1	operation vmid asid sid_vmid_range inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_vmid_asid_range_inc_aset1	Covergroup : inv_req_cross_op_vmid_asid_range_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_op_vmid_asid_va_range_inc_aset1	operation vmid asid addr sid_vmid_range inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_vmid_asid_va_range_inc_aset1	Covergroup : inv_req_cross_op_vmid_asid_va_range_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_op_vmid_ipa_range_inc_aset1	operation vmid addr sid_vmid_range inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_vmid_ipa_range_inc_aset1	Covergroup : inv_req_cross_op_vmid_ipa_range_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_op_vmid_range_inc_aset1	operation vmid sid_vmid_range inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_vmid_range_inc_aset1	Covergroup : inv_req_cross_op_vmid_range_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_op_vmid_va_range_inc_aset1	operation vmid addr sid_vmid_range inc_aset1	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	op_vmid_va_range_inc_aset1	Covergroup : inv_req_cross_op_vmid_va_range_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_scale_num_tg_ttl_range	scale num tg ttl inval_rng		scale_num_tg_ttl_range	Covergroup : inv_req_cross_scale_num_tg_ttl_sec_sid
DTI_PORT_MON_COV	inv_req_cross_scale_num_tg_ttl_range_asid_inc_aset1	scale num tg ttl inval_rng asid inc_aset1		scale_num_tg_ttl_range_asid_inc_aset1	Covergroup : inv_req_cross_scale_num_tg_ttl_range_asid_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_scale_num_tg_ttl_range_asid_vmid_inc_aset1	scale num tg ttl inval_rng asid vmid inc_aset1		scale_num_tg_ttl_range_asid_vmid_inc_aset1	Covergroup : inv_req_cross_scale_num_tg_ttl_range_asid_vmid_inc_aset1
DTI_PORT_MON_COV	inv_req_cross_scale_num_tg_ttl_sec_sid	scale num tg ttl sec_sid		scale_num_tg_ttl_sec_sid	Covergroup : inv_req_cross_scale_num_tg_ttl_range
DTI_PORT_MON_COV	inv_req_dti_asid	asid		--	Covergroup : inv_req_dti_asid
DTI_PORT_MON_COV	inv_req_dti_inc_aset1	inc_aset1		--	Covergroup : inv_req_dti_inc_aset1
DTI_PORT_MON_COV	inv_req_dti_num	num		--	Covergroup : inv_req_dti_num
DTI_PORT_MON_COV	inv_req_dti_operation	operation	operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL	--	Covergroup : inv_req_dti_operation
DTI_PORT_MON_COV	inv_req_dti_range	sid_vmid_range		--	Covergroup : inv_req_dti_range
DTI_PORT_MON_COV	inv_req_dti_scale	scale		--	Covergroup : inv_req_dti_scale
DTI_PORT_MON_COV	inv_req_dti_sid	stream_id		--	Covergroup : inv_req_dti_sid
DTI_PORT_MON_COV	inv_req_dti_ssid	substream_id		--	Covergroup : inv_req_dti_ssid
DTI_PORT_MON_COV	inv_req_dti_translation_granule_size	tg		--	Covergroup : inv_req_dti_translation_granule_size
DTI_PORT_MON_COV	inv_req_dti_translation_table_level	ttl		--	Covergroup : inv_req_dti_translation_table_level
DTI_PORT_MON_COV	inv_req_dti_va_ipa	addr		--	Covergroup : inv_req_dti_va_ipa
DTI_PORT_MON_COV	inv_req_dti_vmid	vmid		--	Covergroup : inv_req_dti_vmid
DTI_PORT_MON_COV	inv_rsp_dti_msg	inv_ack_op	inv_ack_op:inv_ack	--	Covergroup : inv_rsp_dti_msg
DTI_PORT_MON_COV	page_cross_prg_idx_addr	ats_page_request_group ats_trans_resp_addr		page_cross_prg_idx_addr	Covergroup : page_cross_prg_idx_addr
DTI_PORT_MON_COV	page_cross_prg_idx_addr_last_sid_ssid_ssv	ats_page_request_group ats_trans_resp_addr ats_last ats_page_req_strm_id ats_page_req_sub_strm_id ats_page_req_val_sub_strm		page_cross_prg_idx_addr_last_sid_ssid_ssv	Covergroup : page_cross_prg_idx_addr_last_sid_ssid_ssv
DTI_PORT_MON_COV	page_cross_prg_idx_resp	ats_page_request_group ats_page_resp		page_cross_prg_idx_resp	Covergroup : page_cross_prg_idx_resp
DTI_PORT_MON_COV	page_cross_prg_idx_sid_ssid_ssv	ats_page_request_group ats_page_req_strm_id ats_page_req_sub_strm_id ats_page_req_val_sub_strm		page_cross_prg_idx_sid_ssid_ssv	Covergroup : page_cross_prg_idx_sid_ssid_ssv
DTI_PORT_MON_COV	page_cross_write_read_inst_priv	ats_page_write_access ats_page_read_access ats_page_execute_access ats_page_priv_access		page_cross_write_read_inst_priv	Covergroup : page_cross_write_read_inst_priv
DTI_PORT_MON_COV	page_cross_write_read_last_sid_ssid_ssv	ats_page_write_access ats_page_read_access ats_last ats_page_req_strm_id ats_page_req_sub_strm_id ats_page_req_val_sub_strm		page_cross_write_read_last_sid_ssid_ssv	Covergroup : page_cross_write_read_last_sid_ssid_ssv
DTI_PORT_MON_COV	sync_req_dti_msg	message_type sync_req_op	message_type:condis_req, condis_ack, trans_req, trans_resp, trans_fault, inv_req, inv_ack, sync_req, sync_ack, reg_write, reg_write_ack, reg_read, reg_rdata, imp_def_type1_req, imp_def_type2_req, imp_def_type1_resp, imp_def_type2_resp, ats_condis_req, ats_condis_ack, ats_trans_req, ats_trans_resp, ats_trans_fault, ats_inv_req, ats_inv_ack, ats_sync_req, ats_sync_ack, ats_page_req, ats_page_ack, ats_page_resp, ats_page_respack, ats_inv_comp sync_req_op:sync_req	--	Covergroup : sync_req_dti_msg
DTI_PORT_MON_COV	sync_rsp_dti_msg	message_type sync_rsp_op	message_type:condis_req, condis_ack, trans_req, trans_resp, trans_fault, inv_req, inv_ack, sync_req, sync_ack, reg_write, reg_write_ack, reg_read, reg_rdata, imp_def_type1_req, imp_def_type2_req, imp_def_type1_resp, imp_def_type2_resp, ats_condis_req, ats_condis_ack, ats_trans_req, ats_trans_resp, ats_trans_fault, ats_inv_req, ats_inv_ack, ats_sync_req, ats_sync_ack, ats_page_req, ats_page_ack, ats_page_resp, ats_page_respack, ats_inv_comp sync_rsp_op:sync_ack	--	Covergroup : sync_rsp_dti_msg
DTI_PORT_MON_COV	trans_cross_allow_x_allow_w_allow_r	allow_x allow_w allow_r		trans_cross_allow_x_allow_w_allow_r	Covergroup : trans_cross_allow_x_allow_w_allow_r
DTI_PORT_MON_COV	trans_cross_asid_with_aset	trans_resp_asid aset		aset_trans_resp_asid	Covergroup : trans_cross_asid_with_aset .
DTI_PORT_MON_COV	trans_cross_attr_ovr_v2_sec_sid_sid	ovr_attributes_v2 sec_sid strm_id		attr_ovr_v2_sec_sid_sid	Covergroup : trans_cross_attr_ovr_v2_sec_sid_sid
DTI_PORT_MON_COV	trans_cross_attr_ovr_v2_sec_sid_sid_ns	ovr_attributes_v2 sec_sid strm_id sec_nsec_access		attr_ovr_v2_sec_sid_sid_ns	Covergroup : trans_cross_attr_ovr_v2_sec_sid_sid_ns
DTI_PORT_MON_COV	trans_cross_attr_ovr_with_alloccfg_v1	ovr_attributes_v1 alloccfg		attr_ovr_alloccfg	Covergroup : trans_cross_attr_ovr_with_alloccfg_v1 .
DTI_PORT_MON_COV	trans_cross_attr_ovr_with_alloccfg_v2	ovr_attributes_v2 alloccfg		attr_ovr_alloccfg	Covergroup : trans_cross_attr_ovr_with_alloccfg_v2 .
DTI_PORT_MON_COV	trans_cross_attr_ovr_with_attr_with_sh_v1	ovr_attributes_v1 trans_attr sh		attr_ovr_attr_sh	Covergroup : trans_cross_attr_ovr_with_attr_with_sh_v1 .
DTI_PORT_MON_COV	trans_cross_attr_ovr_with_attr_with_sh_v2	ovr_attributes_v2 trans_attr sh		attr_ovr_attr_sh	Covergroup : trans_cross_attr_ovr_with_attr_with_sh_v2 .
DTI_PORT_MON_COV	trans_cross_bp_type_with_bypass	bp_type bypass		bypass_bp_type	Covergroup : trans_cross_bp_type_with_bypass .
DTI_PORT_MON_COV	trans_cross_condis_req_state_condis_ack_state	con_req con_accept		state_ack_or_deny	Covergroup: trans_cross_condis_req_state_condis_ack_state .
DTI_PORT_MON_COV	trans_cross_fault_type_with_donot_cache	fault_type dont_cache		fault_type_donot_cache	Covergroup : trans_cross_fault_type_with_donot_cache .
DTI_PORT_MON_COV	trans_cross_fault_type_with_donot_cache_v1	fault_type_v1 dont_cache	fault_type_v1:fault_type_e_NON_ABORT_v1, fault_type_e_ABORT_v1, fault_type_e_STREAM_DISABLED_v1, fault_type_e_GLOBAL_DISABLED_v1	fault_type_donot_cache_v1	Covergroup : trans_cross_fault_type_with_donot_cache_v1 .
DTI_PORT_MON_COV	trans_cross_fault_type_with_donot_cache_v2	fault_type_v2 dont_cache	fault_type_v2:fault_type_e_NON_ABORT_v2, fault_type_e_ABORT_v2, fault_type_e_STREAM_DISABLED_v2, fault_type_e_GLOBAL_DISABLED_v2, fault_type_e_TRANSLATION_PRI_v2, fault_type_e_TRANSLATION_STALL_v2	fault_type_donot_cache_v2	Covergroup : trans_cross_fault_type_with_donot_cache_v2 .
DTI_PORT_MON_COV	trans_cross_global_ssid_ssv	global_val sub_strm_id val_sub_strm		trans_cross_global_ssid_ssv	Covergroup : trans_cross_global_ssid_ssv
DTI_PORT_MON_COV	trans_cross_global_with_asid	global_val trans_resp_asid		global_asid	Covergroup : trans_cross_global_with_asid .
DTI_PORT_MON_COV	trans_cross_global_with_shareability	global_val sh		global_sh	Covergroup : trans_cross_global_with_shareability .
DTI_PORT_MON_COV	trans_cross_global_with_smmu_stream_world	global_val strw		global_strw	Covergroup : trans_cross_global_with_smmu_stream_world .
DTI_PORT_MON_COV	trans_cross_ind_with_instcfg	inst_data_access ovr_rd_ind	inst_data_access:data_access, inst_access	ind_instcfg	Covergroup : trans_cross_ind_with_instcfg .
DTI_PORT_MON_COV	trans_cross_inst_pnu_with_allow_pr_allow_ur_instcfg_privcfg	inst_data_access ovr_rd_ind priv_unpriv_access ovr_rd_pnu allow_pr allow_ur	inst_data_access:data_access, inst_access priv_unpriv_access:priv_access, unpriv_access	inst_pnu_instcfg_priv_allow_ur_pr	Covergroup : trans_cross_inst_pnu_with_allow_pr_allow_ur_instcfg_privcfg .
DTI_PORT_MON_COV	trans_cross_inst_pnu_with_allow_pw_allow_uw_instcfg_privcfg	inst_data_access ovr_rd_ind priv_unpriv_access ovr_rd_pnu allow_pw allow_uw	inst_data_access:data_access, inst_access priv_unpriv_access:priv_access, unpriv_access	inst_pnu_instcfg_priv_allow_uw_pw	Covergroup : trans_cross_inst_pnu_with_allow_pw_allow_uw_instcfg_privcfg .
DTI_PORT_MON_COV	trans_cross_inst_pnu_with_allow_px_allow_ux_instcfg_privcfg	inst_data_access ovr_rd_ind priv_unpriv_access ovr_rd_pnu allow_px allow_ux	inst_data_access:data_access, inst_access priv_unpriv_access:priv_access, unpriv_access	inst_pnu_instcfg_priv_allow_ux_px	Covergroup : trans_cross_inst_pnu_with_allow_px_allow_ux_instcfg_privcfg .
DTI_PORT_MON_COV	trans_cross_invalidation_range_with_translation_range_with_bypass_0	inval_rng trans_rng_bypass_0		inval_rng_trans_rng	Covergroup : trans_cross_invalidation_range_with_translation_range_with_bypass_0 .
DTI_PORT_MON_COV	trans_cross_mpamns_sec_sid_part_id_pmg_v1	mpamns_v1 sec_sid part_id_v1 pmg_v1		mpamns_sec_sid_part_id_pmg_v1	Covergroup : trans_cross_mpamns_sec_sid_part_id_pmg_v1
DTI_PORT_MON_COV	trans_cross_mpamns_sec_sid_part_id_pmg_v2	mpamns_v2 sec_sid part_id_v2 pmg_v2	mpamns_v2:mpamns_e_v2 pmg_v2:pmg_e_b	mpamns_sec_sid_part_id_pmg_v2	Covergroup : trans_cross_mpamns_sec_sid_part_id_pmg_v2
DTI_PORT_MON_COV	trans_cross_non_secure_access_with_ind_with_pnu	sec_nsec_access inst_data_access priv_unpriv_access	inst_data_access:data_access, inst_access priv_unpriv_access:priv_access, unpriv_access	ns_ind_pnu	Covergroup: trans_cross_non_secure_access_with_ind_with_pnu .
DTI_PORT_MON_COV	trans_cross_non_secure_access_with_perm_req_with_instruction_access	sec_nsec_access permission_req inst_data_access	inst_data_access:data_access, inst_access	ns_perm_ind	Covergroup : trans_cross_non_secure_access_with_perm_req_with_instruction_access .
DTI_PORT_MON_COV	trans_cross_non_secure_access_with_perm_req_with_privileged_access	sec_nsec_access permission_req priv_unpriv_access	priv_unpriv_access:priv_access, unpriv_access	ns_perm_pnu	Covergroup : trans_cross_non_secure_access_with_perm_req_with_privileged_access .
DTI_PORT_MON_COV	trans_cross_non_secure_with_override_non_secure	nsovr trans_resp_ns		ns_nsovr	Covergroup : trans_cross_non_secure_with_override_non_secure .
DTI_PORT_MON_COV	trans_cross_ns_inst_priv_with_fault_type_donot_cache	inst_data_access priv_unpriv_access sec_nsec_access fault_type dont_cache	inst_data_access:data_access, inst_access priv_unpriv_access:priv_access, unpriv_access	ns_inst_priv_fault_type_donot_cache	Covergroup : trans_cross_ns_inst_priv_with_fault_type_donot_cache .
DTI_PORT_MON_COV	trans_cross_ns_inst_priv_with_fault_type_donot_cache_v1	inst_data_access priv_unpriv_access sec_nsec_access fault_type_v1 dont_cache	inst_data_access:data_access, inst_access priv_unpriv_access:priv_access, unpriv_access fault_type_v1:fault_type_e_NON_ABORT_v1, fault_type_e_ABORT_v1, fault_type_e_STREAM_DISABLED_v1, fault_type_e_GLOBAL_DISABLED_v1	ns_inst_priv_fault_type_donot_cache_v1	Covergroup : trans_cross_ns_inst_priv_with_fault_type_donot_cache_v1 .
DTI_PORT_MON_COV	trans_cross_ns_inst_priv_with_fault_type_donot_cache_v2	inst_data_access priv_unpriv_access sec_nsec_access fault_type_v2 dont_cache	inst_data_access:data_access, inst_access priv_unpriv_access:priv_access, unpriv_access fault_type_v2:fault_type_e_NON_ABORT_v2, fault_type_e_ABORT_v2, fault_type_e_STREAM_DISABLED_v2, fault_type_e_GLOBAL_DISABLED_v2, fault_type_e_TRANSLATION_PRI_v2, fault_type_e_TRANSLATION_STALL_v2	ns_inst_priv_fault_type_donot_cache_v2	Covergroup : trans_cross_ns_inst_priv_with_fault_type_donot_cache_v2 .
DTI_PORT_MON_COV	trans_cross_ns_with_strw_with_dre	trans_resp_ns dre strw		ns_dre_stwr	Covergroup : trans_cross_ns_with_strw_with_dre .
DTI_PORT_MON_COV	trans_cross_pnu_with_privcfg	priv_unpriv_access ovr_rd_pnu	priv_unpriv_access:priv_access, unpriv_access	priv_privcfg	Covergroup : trans_cross_pnu_with_privcfg .
DTI_PORT_MON_COV	trans_cross_req_ns_with_resp_ns	sec_nsec_access trans_resp_ns		trans_req_ns_trans_resp_ns	Covergroup : trans_cross_req_ns_with_resp_ns .
DTI_PORT_MON_COV	trans_cross_secure_streamid_with_non_secure_access	sec_nsec_access sec_sid		secsid_ns	Covergroup : trans_cross_secure_streamid_with_non_secure_access .
DTI_PORT_MON_COV	trans_cross_secure_streamid_with_streamid	sec_sid strm_id		secsid_sid	Covergroup : trans_cross_secure_streamid_with_streamid.
DTI_PORT_MON_COV	trans_cross_shareability_with_translation_attribute	sh trans_attr		sh_trans_attr	Covergroup : trans_cross_shareability_with_translation_attribute .
DTI_PORT_MON_COV	trans_cross_speculative_with_read_write_access	speculative read_write_access		speculative_rnw	Covergroup : trans_cross_speculative_with_read_write_access .
DTI_PORT_MON_COV	trans_cross_sub_streamid_with_valid_substream	sub_strm_id val_sub_strm		ssid_ssv	Covergroup : trans_cross_sub_streamid_with_valid_substream .
DTI_PORT_MON_COV	trans_cross_tok_trans_req_tok_trans_gnt	token_granted token_requested	token_granted:token_gnt_00, token_gnt_01_to_03, token_gnt_04_to_07, token_gnt_08_to_0B, token_gnt_0C_to_0F, token_gnt_10_to_13, token_gnt_14_to_17, token_gnt_18_to_1B, token_gnt_1C_to_1F, token_gnt_20_to_23, token_gnt_24_to_27, token_gnt_28_to_2B, token_gnt_2C_to_2F, token_gnt_30_to_33, token_gnt_34_to_37, token_gnt_38_to_3B, token_gnt_3C_to_3F, token_gnt_40_to_43, token_gnt_44_to_47, token_gnt_48_to_4B, token_gnt_4C_to_4F, token_gnt_50_to_53, token_gnt_54_to_57, token_gnt_58_to_5B, token_gnt_5C_to_5F, token_gnt_60_to_63, token_gnt_64_to_67, token_gnt_68_to_6B, token_gnt_6C_to_6F, token_gnt_70_to_73, token_gnt_74_to_77, token_gnt_78_to_7B, token_gnt_7C_to_7F, token_gnt_80_to_83, token_gnt_84_to_87, token_gnt_88_to_8B, token_gnt_8C_to_8F, token_gnt_90_to_93, token_gnt_94_to_97, token_gnt_98_to_9B, token_gnt_9C_to_9F, token_gnt_A0_to_A3, token_gnt_A4_to_A7, token_gnt_A8_to_AB, token_gnt_AC_to_AF, token_gnt_B0_to_B3, token_gnt_B4_to_B7, token_gnt_B8_to_BB, token_gnt_BC_to_BF, token_gnt_C0_to_C3, token_gnt_C4_to_C7, token_gnt_C8_to_CB, token_gnt_CC_to_CF, token_gnt_D0_to_D3, token_gnt_D4_to_D7, token_gnt_D8_to_DB, token_gnt_DC_to_DF, token_gnt_E0_to_E3, token_gnt_E4_to_E7, token_gnt_E8_to_EB, token_gnt_EC_to_EF, token_gnt_F0_to_F3, token_gnt_F4_to_F7, token_gnt_F8_to_FB, token_gnt_FC_to_FE, token_gnt_FF token_requested:token_00, token_01_to_0F, token_10_to_1F, token_20_to_2F, token_30_to_3F, token_40_to_4F, token_50_to_5F, token_60_to_6F, token_70_to_7F, token_80_to_8F, token_90_to_9F, token_A0_to_AF, token_B0_to_BF, token_C0_to_CF, token_D0_to_DF, token_E0_to_EF, token_F0_to_FE, token_FF	tok_req_tok_gnt	Covergroup: trans_cross_tok_trans_req_tok_trans_gnt .
DTI_PORT_MON_COV	trans_cross_tok_trans_req_tok_trans_gnt_v1	token_granted_v1 token_requested_v1	token_granted_v1:token_gnt_000_v1, token_gnt_001_to_003_v1, token_gnt_004_to_007_v1, token_gnt_008_to_00B_v1, token_gnt_00C_to_00F_v1, token_gnt_010_to_013_v1, token_gnt_014_to_017_v1, token_gnt_018_to_01B_v1, token_gnt_01C_to_01F_v1, token_gnt_020_to_023_v1, token_gnt_024_to_027_v1, token_gnt_028_to_02B_v1, token_gnt_02C_to_02F_v1, token_gnt_030_to_033_v1, token_gnt_034_to_037_v1, token_gnt_038_to_03B_v1, token_gnt_03C_to_03F_v1, token_gnt_040_to_043_v1, token_gnt_044_to_047_v1, token_gnt_048_to_04B_v1, token_gnt_04C_to_04F_v1, token_gnt_050_to_053_v1, token_gnt_054_to_057_v1, token_gnt_058_to_05B_v1, token_gnt_05C_to_05F_v1, token_gnt_060_to_063_v1, token_gnt_064_to_067_v1, token_gnt_068_to_06B_v1, token_gnt_06C_to_06F_v1, token_gnt_070_to_073_v1, token_gnt_074_to_077_v1, token_gnt_078_to_07B_v1, token_gnt_07C_to_07F_v1, token_gnt_080_to_083_v1, token_gnt_084_to_087_v1, token_gnt_088_to_08B_v1, token_gnt_08C_to_08F_v1, token_gnt_090_to_093_v1, token_gnt_094_to_097_v1, token_gnt_098_to_09B_v1, token_gnt_09C_to_09F_v1, token_gnt_0A0_to_0A3_v1, token_gnt_0A4_to_0A7_v1, token_gnt_0A8_to_0AB_v1, token_gnt_0AC_to_0AF_v1, token_gnt_0B0_to_0B3_v1, token_gnt_0B4_to_0B7_v1, token_gnt_0B8_to_0BB_v1, token_gnt_0BC_to_0BF_v1, token_gnt_0C0_to_0C3_v1, token_gnt_0C4_to_0C7_v1, token_gnt_0C8_to_0CB_v1, token_gnt_0CC_to_0CF_v1, token_gnt_0D0_to_0D3_v1, token_gnt_0D4_to_0D7_v1, token_gnt_0D8_to_0DB_v1, token_gnt_0DC_to_0DF_v1, token_gnt_0E0_to_0E3_v1, token_gnt_0E4_to_0E7_v1, token_gnt_0E8_to_0EB_v1, token_gnt_0EC_to_0EF_v1, token_gnt_0F0_to_0F3_v1, token_gnt_0F4_to_0F7_v1, token_gnt_0F8_to_0FB_v1, token_gnt_0FC_to_0FE_v1, token_gnt_0FF_v1 token_requested_v1:token_000_v1, token_001_to_00F_v1, token_010_to_01F_v1, token_020_to_02F_v1, token_030_to_03F_v1, token_040_to_04F_v1, token_050_to_05F_v1, token_060_to_06F_v1, token_070_to_07F_v1, token_080_to_08F_v1, token_090_to_09F_v1, token_0A0_to_0AF_v1, token_0B0_to_0BF_v1, token_0C0_to_0CF_v1, token_0D0_to_0DF_v1, token_0E0_to_0EF_v1, token_0F0_to_0FE_v1, token_0FF_v1	tok_req_tok_gnt	Covergroup: trans_cross_tok_trans_req_tok_trans_gnt_v1 .
DTI_PORT_MON_COV	trans_cross_tok_trans_req_tok_trans_gnt_v2	token_granted_v2 token_requested_v2	token_granted_v2:token_gnt_000_v2, token_gnt_001_to_003_v2, token_gnt_004_to_007_v2, token_gnt_008_to_00B_v2, token_gnt_00C_to_00F_v2, token_gnt_010_to_013_v2, token_gnt_014_to_017_v2, token_gnt_018_to_01B_v2, token_gnt_01C_to_01F_v2, token_gnt_020_to_023_v2, token_gnt_024_to_027_v2, token_gnt_028_to_02B_v2, token_gnt_02C_to_02F_v2, token_gnt_030_to_033_v2, token_gnt_034_to_037_v2, token_gnt_038_to_03B_v2, token_gnt_03C_to_03F_v2, token_gnt_040_to_043_v2, token_gnt_044_to_047_v2, token_gnt_048_to_04B_v2, token_gnt_04C_to_04F_v2, token_gnt_050_to_053_v2, token_gnt_054_to_057_v2, token_gnt_058_to_05B_v2, token_gnt_05C_to_05F_v2, token_gnt_060_to_063_v2, token_gnt_064_to_067_v2, token_gnt_068_to_06B_v2, token_gnt_06C_to_06F_v2, token_gnt_070_to_073_v2, token_gnt_074_to_077_v2, token_gnt_078_to_07B_v2, token_gnt_07C_to_07F_v2, token_gnt_080_to_083_v2, token_gnt_084_to_087_v2, token_gnt_088_to_08B_v2, token_gnt_08C_to_08F_v2, token_gnt_090_to_093_v2, token_gnt_094_to_097_v2, token_gnt_098_to_09B_v2, token_gnt_09C_to_09F_v2, token_gnt_0A0_to_0A3_v2, token_gnt_0A4_to_0A7_v2, token_gnt_0A8_to_0AB_v2, token_gnt_0AC_to_0AF_v2, token_gnt_0B0_to_0B3_v2, token_gnt_0B4_to_0B7_v2, token_gnt_0B8_to_0BB_v2, token_gnt_0BC_to_0BF_v2, token_gnt_0C0_to_0C3_v2, token_gnt_0C4_to_0C7_v2, token_gnt_0C8_to_0CB_v2, token_gnt_0CC_to_0CF_v2, token_gnt_0D0_to_0D3_v2, token_gnt_0D4_to_0D7_v2, token_gnt_0D8_to_0DB_v2, token_gnt_0DC_to_0DF_v2, token_gnt_0E0_to_0E3_v2, token_gnt_0E4_to_0E7_v2, token_gnt_0E8_to_0EB_v2, token_gnt_0EC_to_0EF_v2, token_gnt_0F0_to_0F3_v2, token_gnt_0F4_to_0F7_v2, token_gnt_0F8_to_0FB_v2, token_gnt_0FC_to_0FE_v2, token_gnt_0FF_v2, token_100_to_1FF_v2, token_200_to_2FF_v2, token_300_to_3FF_v2, token_400_to_4FF_v2, token_500_to_5FF_v2, token_600_to_6FF_v2, token_700_to_7FF_v2, token_800_to_8FF_v2, token_900_to_9FF_v2, token_A00_to_AFF_v2, token_B00_to_BFF_v2, token_C00_to_CFF_v2, token_D00_to_DFF_v2, token_E00_to_EFF_v2, token_F00_to_FFE_v2, token_FFF_v2 token_requested_v2:token_000_v2, token_001_to_00F_v2, token_010_to_01F_v2, token_020_to_02F_v2, token_030_to_03F_v2, token_040_to_04F_v2, token_050_to_05F_v2, token_060_to_06F_v2, token_070_to_07F_v2, token_080_to_08F_v2, token_090_to_09F_v2, token_0A0_to_0AF_v2, token_0B0_to_0BF_v2, token_0C0_to_0CF_v2, token_0D0_to_0DF_v2, token_0E0_to_0EF_v2, token_0F0_to_0FE_v2, token_0FF_v2, token_100_to_1FF_v2, token_200_to_2FF_v2, token_300_to_3FF_v2, token_400_to_4FF_v2, token_500_to_5FF_v2, token_600_to_6FF_v2, token_700_to_7FF_v2, token_800_to_8FF_v2, token_900_to_9FF_v2, token_A00_to_AFF_v2, token_B00_to_BFF_v2, token_C00_to_CFF_v2, token_D00_to_DFF_v2, token_E00_to_EFF_v2, token_F00_to_FFE_v2, token_FFF_v2	tok_req_tok_gnt	Covergroup: trans_cross_tok_trans_req_tok_trans_gnt_v2 .
DTI_PORT_MON_COV	trans_dti_allow_data_read_access	allow_r		--	Covergroup :trans_dti_allow_data_read_access .
DTI_PORT_MON_COV	trans_dti_allow_data_write_access	allow_w		--	Covergroup :trans_dti_allow_data_write_access .
DTI_PORT_MON_COV	trans_dti_allow_instruction_read_access	allow_x		--	Covergroup :trans_dti_allow_instruction_read_access .
DTI_PORT_MON_COV	trans_dti_allow_non_sec_inst_reads	allow_nsx		--	Covergroup :trans_dti_allow_non_sec_inst_reads .
DTI_PORT_MON_COV	trans_dti_allow_priv_inst_reads	allow_px		--	Covergroup :trans_dti_allow_priv_inst_reads .
DTI_PORT_MON_COV	trans_dti_allow_priv_read_data_access	allow_pr		--	Covergroup :trans_dti_allow_priv_read_data_access .
DTI_PORT_MON_COV	trans_dti_allow_priv_write_data_access	allow_pw		--	Covergroup :trans_dti_allow_priv_write_data_access .
DTI_PORT_MON_COV	trans_dti_allow_unpriv_data_read_access	allow_ur		--	Covergroup :trans_dti_allow_unpriv_data_read_access .
DTI_PORT_MON_COV	trans_dti_allow_unpriv_data_write_access	allow_uw		--	Covergroup :trans_dti_allow_unpriv_data_write_access .
DTI_PORT_MON_COV	trans_dti_allow_unpriv_instruction_reads	allow_ux		--	Covergroup :trans_dti_allow_unpriv_instruction_reads .
DTI_PORT_MON_COV	trans_dti_ats_condis_req_no_trans	ats_no_trans	ats_no_trans:no_trans_e	--	Covergroup : trans_dti_ats_condis_req_no_trans
DTI_PORT_MON_COV	trans_dti_ats_error	ats_error		--	Covergroup : trans_dti_ats_error .
DTI_PORT_MON_COV	trans_dti_ats_error_v3	ats_error		--	Covergroup : trans_dti_ats_error_v3 .
DTI_PORT_MON_COV	trans_dti_ats_fault_type	ats_fault_type		--	Covergroup :trans_dti_ats_fault_type .
DTI_PORT_MON_COV	trans_dti_ats_page_execute_access	ats_page_execute_access		--	Covergroup : trans_dti_ats_page_execute_access
DTI_PORT_MON_COV	trans_dti_ats_page_last	ats_last		--	Covergroup : trans_dti_ats_page_last
DTI_PORT_MON_COV	trans_dti_ats_page_priv_access	ats_page_priv_access		--	Covergroup : trans_dti_ats_page_priv_access
DTI_PORT_MON_COV	trans_dti_ats_page_read_access	ats_page_read_access		--	Covergroup : trans_dti_ats_page_read_access
DTI_PORT_MON_COV	trans_dti_ats_page_request_group	ats_page_request_group		--	Covergroup : trans_dti_ats_page_request_group
DTI_PORT_MON_COV	trans_dti_ats_page_resp	ats_page_resp		--	Covergroup : trans_dti_ats_page_resp
DTI_PORT_MON_COV	trans_dti_ats_page_stream_id	ats_page_req_strm_id		--	Covergroup : trans_dti_ats_page_stream_id
DTI_PORT_MON_COV	trans_dti_ats_page_sub_stream_id	ats_page_req_sub_strm_id		--	Covergroup : trans_dti_ats_page_sub_stream_id
DTI_PORT_MON_COV	trans_dti_ats_page_valid_substream	ats_page_req_val_sub_strm		--	Covergroup : trans_dti_ats_page_valid_substream
DTI_PORT_MON_COV	trans_dti_ats_page_write_access	ats_page_write_access		--	Covergroup : trans_dti_ats_page_write_access
DTI_PORT_MON_COV	trans_dti_ats_range	ats_rage		--	Covergroup : trans_dti_ats_range
DTI_PORT_MON_COV	trans_dti_ats_trans_resp_ats_memory_type_attributes_v1	ats_no_trans_v1		--	Covergroup : trans_dti_ats_trans_resp_ats_memory_type_attributes_v1
DTI_PORT_MON_COV	trans_dti_ats_trans_resp_ats_memory_type_attributes_v2	ats_no_trans_v2	ats_no_trans_v2:ama_v2	--	Covergroup : trans_dti_ats_trans_resp_ats_memory_type_attributes_v2
DTI_PORT_MON_COV	trans_dti_ats_trans_resp_cxl_io_v1	ats_cxl_io_v1		--	Covergroup : trans_dti_ats_trans_resp_cxl_io_v1
DTI_PORT_MON_COV	trans_dti_ats_trans_resp_cxl_io_v2	ats_cxl_io_v2	ats_cxl_io_v2:cxl_io_v2	--	Covergroup : trans_dti_ats_trans_resp_cxl_io_v2
DTI_PORT_MON_COV	trans_dti_ats_translated	atst		--	Covergroup :trans_dti_ats_translated .
DTI_PORT_MON_COV	trans_dti_ats_translation_range_with_bypass_0	trans_ats_rng_bypass_0		--	Covergroup :trans_dti_ats_translation_range_with_bypass_0 .
DTI_PORT_MON_COV	trans_dti_ats_translation_range_with_bypass_1_v1	trans_ats_rng_bypass_1_v1		--	Covergroup :trans_dti_ats_translation_range_with_bypass_1_v1 .
DTI_PORT_MON_COV	trans_dti_ats_translation_range_with_bypass_1_v2	trans_ats_rng_bypass_1_v2		--	Covergroup :trans_dti_ats_translation_range_with_bypass_1_v2 .
DTI_PORT_MON_COV	trans_dti_ats_translation_resp_output_address	ats_trans_resp_addr		--	Covergroup: trans_dti_ats_translation_resp_output_address. User can configure automatic bins for this covergroup by setting macro: SVT_DTI_DTI_TRANS_RESP_ADDR_AUTO_BINS. Default value of SVT_DTI_DTI_TRANS_RESP_ADDR_AUTO_BINS macro is 256 .
DTI_PORT_MON_COV	trans_dti_ats_untranslated	ats_untranslated		--	Covergroup :trans_dti_ats_untranslated .
DTI_PORT_MON_COV	trans_dti_ats_write_access	nW		--	Covergroup :trans_dti_ats_write_access .
DTI_PORT_MON_COV	trans_dti_bypassed_translation	bypass		--	Covergroup: trans_dti_bypassed_translation .
DTI_PORT_MON_COV	trans_dti_combined_allocate_v1	comb_alloc_v1		--	Covergroup: trans_dti_combined_allocate_v1 .
DTI_PORT_MON_COV	trans_dti_combined_allocate_v2	comb_alloc_v2	comb_alloc_v2:comb_alloc_e_b_v2	--	Covergroup: trans_dti_combined_allocate_v2 .
DTI_PORT_MON_COV	trans_dti_combined_memory_type_v1	comb_mt_v1		--	Covergroup: trans_dti_combined_memory_type_v1 .
DTI_PORT_MON_COV	trans_dti_combined_memory_type_v2	comb_mt	comb_mt:comb_mt_e_b_v2	--	Covergroup: trans_dti_combined_memory_type_v2 .
DTI_PORT_MON_COV	trans_dti_combined_shareability_v1	comb_sh_v1		--	Covergroup: trans_dti_combined_shareability_v1 .
DTI_PORT_MON_COV	trans_dti_combined_shareability_v2	comb_sh_v2	comb_sh_v2:comb_sh_e_v2	--	Covergroup: trans_dti_combined_shareability_v2 .
DTI_PORT_MON_COV	trans_dti_condis_ack_state_accepted	con_accept		--	Covergroup: trans_dti_condis_ack_state_accepted .
DTI_PORT_MON_COV	trans_dti_condis_req_state_requested	con_req		--	Covergroup: trans_dti_condis_req_state_requested .
DTI_PORT_MON_COV	trans_dti_contiguous_stream_id	contiguous_stream		--	Covergroup: trans_dti_contiguous_stream_id .
DTI_PORT_MON_COV	trans_dti_ctxtattr	ctxtattr		--	Covergroup: trans_dti_ctxtattr .
DTI_PORT_MON_COV	trans_dti_destructive_reads_permitted	dre		--	Covergroup :trans_dti_destructive_reads_permitted .
DTI_PORT_MON_COV	trans_dti_directed_cache_prefetch	dcp		--	Covergroup :trans_dti_directed_cache_prefetch .
DTI_PORT_MON_COV	trans_dti_donot_cache	dont_cache		--	Covergroup: trans_dti_donot_cache .
DTI_PORT_MON_COV	trans_dti_flow_v1	flow_v1		--	Covergroup: trans_dti_flow_v1 .
DTI_PORT_MON_COV	trans_dti_flow_v2	flow_v2		--	Covergroup: trans_dti_flow_v2 .
DTI_PORT_MON_COV	trans_dti_global_valid	global_val		--	Covergroup :trans_dti_global_valid.
DTI_PORT_MON_COV	trans_dti_hardware_attributes	hwattr		--	Covergroup :trans_dti_hardware_attributes .
DTI_PORT_MON_COV	trans_dti_inst_data_access	inst_data_access	inst_data_access:data_access, inst_access	--	Covergroup: trans_dti_inst_data_access .
DTI_PORT_MON_COV	trans_dti_invalidation_range	inval_rng		--	Covergroup :trans_dti_invalidation_range .
DTI_PORT_MON_COV	trans_dti_invalidation_token_granted	inv_token_req	inv_token_req:token_0, token_1_to_3, token_4_to_6, token_7_to_9, token_A_to_C, token_D_to_E, token_F	--	Covergroup: trans_dti_invalidation_token_granted .
DTI_PORT_MON_COV	trans_dti_message_type	message_type	message_type:condis_req, condis_ack, trans_req, trans_resp, trans_fault, inv_req, inv_ack, sync_req, sync_ack, reg_write, reg_write_ack, reg_read, reg_rdata, imp_def_type1_req, imp_def_type2_req, imp_def_type1_resp, imp_def_type2_resp, ats_condis_req, ats_condis_ack, ats_trans_req, ats_trans_resp, ats_trans_fault, ats_inv_req, ats_inv_ack, ats_sync_req, ats_sync_ack, ats_page_req, ats_page_ack, ats_page_resp, ats_page_respack, ats_inv_comp	--	Covergroup: trans_dti_message_type Coverpoints: cov_message_type: Captures the message type seen in transaction
DTI_PORT_MON_COV	trans_dti_mpamns_v1	mpamns_v1		--	Covergroup: trans_dti_mpamns_v1 .
DTI_PORT_MON_COV	trans_dti_mpamns_v2	mpamns_v2	mpamns_v2:mpamns_e_v2	--	Covergroup: trans_dti_mpamns_v2 .
DTI_PORT_MON_COV	trans_dti_output_address_size	output_address_size	output_address_size:size_32_bits, size_36_bits, size_40_bits, size_42_bits, size_44_bits, size_48_bits, size_52_bits	--	Covergroup: trans_dti_output_address_size .
DTI_PORT_MON_COV	trans_dti_override_allocation	alloccfg		--	Covergroup: trans_dti_override_allocation .
DTI_PORT_MON_COV	trans_dti_override_attributes_v1	ovr_attributes_v1		--	Covergroup: trans_dti_override_attributes_v1 .
DTI_PORT_MON_COV	trans_dti_override_attributes_v2	ovr_attributes_v2		--	Covergroup: trans_dti_override_attributes_v2 .
DTI_PORT_MON_COV	trans_dti_override_instruction_data_access	ovr_rd_ind		--	Covergroup: trans_dti_override_instruction_data_access .
DTI_PORT_MON_COV	trans_dti_override_non_secure_access	nsovr		--	Covergroup: trans_dti_override_non_secure_access .
DTI_PORT_MON_COV	trans_dti_override_privileged_access	ovr_rd_pnu		--	Covergroup: trans_dti_override_privileged_access .
DTI_PORT_MON_COV	trans_dti_part_id_v1	part_id_v1		--	Covergroup: trans_dti_part_id_v1 .
DTI_PORT_MON_COV	trans_dti_part_id_v2	part_id_v2		--	Covergroup: trans_dti_part_id_v2 .
DTI_PORT_MON_COV	trans_dti_permissions_required	permission_req		--	Covergroup: trans_dti_permissions_required .
DTI_PORT_MON_COV	trans_dti_pmg_v1	pmg_v1		--	Covergroup: trans_dti_pmg_v1 .
DTI_PORT_MON_COV	trans_dti_pmg_v2	pmg_v2	pmg_v2:pmg_e_b	--	Covergroup: trans_dti_pmg_v2 .
DTI_PORT_MON_COV	trans_dti_priv_unpriv_access	priv_unpriv_access	priv_unpriv_access:priv_access, unpriv_access	--	Covergroup: trans_dti_priv_unpriv_access .
DTI_PORT_MON_COV	trans_dti_protocol	protocol	protocol:protocol_tbu, protocol_ats	--	Covergroup : trans_dti_protocol .
DTI_PORT_MON_COV	trans_dti_quality_of_service	quality_of_service	quality_of_service:qos	--	Covergroup: trans_dti_quality_of_service .
DTI_PORT_MON_COV	trans_dti_register_access_supported	reg_access_supported		--	Covergroup: trans_dti_register_access_supported .
DTI_PORT_MON_COV	trans_dti_req_input_address	trans_req_addr		--	Covergroup: trans_dti_req_input_address User can configure automatic bins for this covergroup by setting macro: SVT_DTI_DTI_TRANS_REQ_ADDR_AUTO_BINS. Default value of SVT_DTI_DTI_TRANS_REQ_ADDR_AUTO_BINS macro is 256 .
DTI_PORT_MON_COV	trans_dti_secure_non_secure_access	sec_nsec_access		--	Covergroup: trans_dti_secure_non_secure_access .
DTI_PORT_MON_COV	trans_dti_secure_read_write_access	read_write_access		--	Covergroup: trans_dti_secure_read_write_access .
DTI_PORT_MON_COV	trans_dti_secure_stream_id	sec_sid		--	Covergroup: trans_dti_secure_stream_id .
DTI_PORT_MON_COV	trans_dti_shareability_set	aset		--	Covergroup: trans_dti_shareability_set .
DTI_PORT_MON_COV	trans_dti_smmu_stream_world	strw		--	Covergroup: trans_dti_smmu_stream_world .
DTI_PORT_MON_COV	trans_dti_speculative_translation_request	speculative		--	Covergroup: trans_dti_speculative_translation_request .
DTI_PORT_MON_COV	trans_dti_stage1_hardware_attributes	s1hwattr		--	Covergroup :trans_dti_stage1_hardware_attributes .
DTI_PORT_MON_COV	trans_dti_stage2_hardware_attributes	s2hwattr		--	Covergroup :trans_dti_stage2_hardware_attributes .
DTI_PORT_MON_COV	trans_dti_stream_id	strm_id		--	Covergroup: trans_dti_stream_id .
DTI_PORT_MON_COV	trans_dti_sub_stream_id	sub_strm_id		--	Covergroup: trans_dti_sub_stream_id .
DTI_PORT_MON_COV	trans_dti_sup_pri	sup_pri		--	Covergroup : trans_dti_sup_pri .
DTI_PORT_MON_COV	trans_dti_tbu_fault_type	fault_type		--	Covergroup :trans_dti_tbu_fault_type .
DTI_PORT_MON_COV	trans_dti_tbu_fault_type_v1	fault_type_v1	fault_type_v1:fault_type_e_NON_ABORT_v1, fault_type_e_ABORT_v1, fault_type_e_STREAM_DISABLED_v1, fault_type_e_GLOBAL_DISABLED_v1	--	Covergroup :trans_dti_tbu_fault_type_v1 .
DTI_PORT_MON_COV	trans_dti_tbu_fault_type_v2	fault_type_v2	fault_type_v2:fault_type_e_NON_ABORT_v2, fault_type_e_ABORT_v2, fault_type_e_STREAM_DISABLED_v2, fault_type_e_GLOBAL_DISABLED_v2, fault_type_e_TRANSLATION_PRI_v2, fault_type_e_TRANSLATION_STALL_v2	--	Covergroup :trans_dti_tbu_fault_type_v2 .
DTI_PORT_MON_COV	trans_dti_translation_attributes	trans_attr		--	Covergroup: trans_dti_translation_attributes .
DTI_PORT_MON_COV	trans_dti_translation_ids	trans_id	trans_id:ids	--	Covergroup: trans_dti_translation_ids .
DTI_PORT_MON_COV	trans_dti_translation_ids_v1	trans_id_v1	trans_id_v1:ids_v1	--	Covergroup: trans_dti_translation_ids_v1 .
DTI_PORT_MON_COV	trans_dti_translation_ids_v2	trans_id_v2	trans_id_v2:ids_v2	--	Covergroup: trans_dti_translation_ids_v2 .
DTI_PORT_MON_COV	trans_dti_translation_range_with_bypass_0	trans_rng_bypass_0		--	Covergroup :trans_dti_translation_range_with_bypass_0 .
DTI_PORT_MON_COV	trans_dti_translation_range_with_bypass_1	trans_rng_bypass_1		--	Covergroup :trans_dti_translation_range_with_bypass_1 .
DTI_PORT_MON_COV	trans_dti_translation_resp_asid	trans_resp_asid		--	Covergroup: trans_dti_translation_resp_asid .
DTI_PORT_MON_COV	trans_dti_translation_resp_non_secure_access	trans_resp_ns		--	Covergroup :trans_dti_translation_resp_non_secure_access .
DTI_PORT_MON_COV	trans_dti_translation_resp_output_address	trans_resp_addr		--	Covergroup: trans_dti_translation_resp_output_address. User can configure automatic bins for this covergroup by setting macro: SVT_DTI_DTI_TRANS_RESP_ADDR_AUTO_BINS. Default value of SVT_DTI_DTI_TRANS_RESP_ADDR_AUTO_BINS macro is 256 .
DTI_PORT_MON_COV	trans_dti_translation_resp_tbi	tbi		--	Covergroup :trans_dti_translation_resp_tbi .
DTI_PORT_MON_COV	trans_dti_translation_response_vmid	trans_resp_vmid		--	Covergroup: trans_dti_translation_response_vmid .
DTI_PORT_MON_COV	trans_dti_translation_scope	bp_type		--	Covergroup: trans_dti_translation_scope .
DTI_PORT_MON_COV	trans_dti_translation_shareability	sh		--	Covergroup: trans_dti_translation_shareability .
DTI_PORT_MON_COV	trans_dti_translation_token_granted	token_granted	token_granted:token_gnt_00, token_gnt_01_to_03, token_gnt_04_to_07, token_gnt_08_to_0B, token_gnt_0C_to_0F, token_gnt_10_to_13, token_gnt_14_to_17, token_gnt_18_to_1B, token_gnt_1C_to_1F, token_gnt_20_to_23, token_gnt_24_to_27, token_gnt_28_to_2B, token_gnt_2C_to_2F, token_gnt_30_to_33, token_gnt_34_to_37, token_gnt_38_to_3B, token_gnt_3C_to_3F, token_gnt_40_to_43, token_gnt_44_to_47, token_gnt_48_to_4B, token_gnt_4C_to_4F, token_gnt_50_to_53, token_gnt_54_to_57, token_gnt_58_to_5B, token_gnt_5C_to_5F, token_gnt_60_to_63, token_gnt_64_to_67, token_gnt_68_to_6B, token_gnt_6C_to_6F, token_gnt_70_to_73, token_gnt_74_to_77, token_gnt_78_to_7B, token_gnt_7C_to_7F, token_gnt_80_to_83, token_gnt_84_to_87, token_gnt_88_to_8B, token_gnt_8C_to_8F, token_gnt_90_to_93, token_gnt_94_to_97, token_gnt_98_to_9B, token_gnt_9C_to_9F, token_gnt_A0_to_A3, token_gnt_A4_to_A7, token_gnt_A8_to_AB, token_gnt_AC_to_AF, token_gnt_B0_to_B3, token_gnt_B4_to_B7, token_gnt_B8_to_BB, token_gnt_BC_to_BF, token_gnt_C0_to_C3, token_gnt_C4_to_C7, token_gnt_C8_to_CB, token_gnt_CC_to_CF, token_gnt_D0_to_D3, token_gnt_D4_to_D7, token_gnt_D8_to_DB, token_gnt_DC_to_DF, token_gnt_E0_to_E3, token_gnt_E4_to_E7, token_gnt_E8_to_EB, token_gnt_EC_to_EF, token_gnt_F0_to_F3, token_gnt_F4_to_F7, token_gnt_F8_to_FB, token_gnt_FC_to_FE, token_gnt_FF	--	Covergroup: trans_dti_translation_token_granted .
DTI_PORT_MON_COV	trans_dti_translation_token_granted_v1	token_granted_v1	token_granted_v1:token_gnt_000_v1, token_gnt_001_to_003_v1, token_gnt_004_to_007_v1, token_gnt_008_to_00B_v1, token_gnt_00C_to_00F_v1, token_gnt_010_to_013_v1, token_gnt_014_to_017_v1, token_gnt_018_to_01B_v1, token_gnt_01C_to_01F_v1, token_gnt_020_to_023_v1, token_gnt_024_to_027_v1, token_gnt_028_to_02B_v1, token_gnt_02C_to_02F_v1, token_gnt_030_to_033_v1, token_gnt_034_to_037_v1, token_gnt_038_to_03B_v1, token_gnt_03C_to_03F_v1, token_gnt_040_to_043_v1, token_gnt_044_to_047_v1, token_gnt_048_to_04B_v1, token_gnt_04C_to_04F_v1, token_gnt_050_to_053_v1, token_gnt_054_to_057_v1, token_gnt_058_to_05B_v1, token_gnt_05C_to_05F_v1, token_gnt_060_to_063_v1, token_gnt_064_to_067_v1, token_gnt_068_to_06B_v1, token_gnt_06C_to_06F_v1, token_gnt_070_to_073_v1, token_gnt_074_to_077_v1, token_gnt_078_to_07B_v1, token_gnt_07C_to_07F_v1, token_gnt_080_to_083_v1, token_gnt_084_to_087_v1, token_gnt_088_to_08B_v1, token_gnt_08C_to_08F_v1, token_gnt_090_to_093_v1, token_gnt_094_to_097_v1, token_gnt_098_to_09B_v1, token_gnt_09C_to_09F_v1, token_gnt_0A0_to_0A3_v1, token_gnt_0A4_to_0A7_v1, token_gnt_0A8_to_0AB_v1, token_gnt_0AC_to_0AF_v1, token_gnt_0B0_to_0B3_v1, token_gnt_0B4_to_0B7_v1, token_gnt_0B8_to_0BB_v1, token_gnt_0BC_to_0BF_v1, token_gnt_0C0_to_0C3_v1, token_gnt_0C4_to_0C7_v1, token_gnt_0C8_to_0CB_v1, token_gnt_0CC_to_0CF_v1, token_gnt_0D0_to_0D3_v1, token_gnt_0D4_to_0D7_v1, token_gnt_0D8_to_0DB_v1, token_gnt_0DC_to_0DF_v1, token_gnt_0E0_to_0E3_v1, token_gnt_0E4_to_0E7_v1, token_gnt_0E8_to_0EB_v1, token_gnt_0EC_to_0EF_v1, token_gnt_0F0_to_0F3_v1, token_gnt_0F4_to_0F7_v1, token_gnt_0F8_to_0FB_v1, token_gnt_0FC_to_0FE_v1, token_gnt_0FF_v1	--	Covergroup: trans_dti_translation_token_granted_v1 .
DTI_PORT_MON_COV	trans_dti_translation_token_granted_v2	token_granted_v2	token_granted_v2:token_gnt_000_v2, token_gnt_001_to_003_v2, token_gnt_004_to_007_v2, token_gnt_008_to_00B_v2, token_gnt_00C_to_00F_v2, token_gnt_010_to_013_v2, token_gnt_014_to_017_v2, token_gnt_018_to_01B_v2, token_gnt_01C_to_01F_v2, token_gnt_020_to_023_v2, token_gnt_024_to_027_v2, token_gnt_028_to_02B_v2, token_gnt_02C_to_02F_v2, token_gnt_030_to_033_v2, token_gnt_034_to_037_v2, token_gnt_038_to_03B_v2, token_gnt_03C_to_03F_v2, token_gnt_040_to_043_v2, token_gnt_044_to_047_v2, token_gnt_048_to_04B_v2, token_gnt_04C_to_04F_v2, token_gnt_050_to_053_v2, token_gnt_054_to_057_v2, token_gnt_058_to_05B_v2, token_gnt_05C_to_05F_v2, token_gnt_060_to_063_v2, token_gnt_064_to_067_v2, token_gnt_068_to_06B_v2, token_gnt_06C_to_06F_v2, token_gnt_070_to_073_v2, token_gnt_074_to_077_v2, token_gnt_078_to_07B_v2, token_gnt_07C_to_07F_v2, token_gnt_080_to_083_v2, token_gnt_084_to_087_v2, token_gnt_088_to_08B_v2, token_gnt_08C_to_08F_v2, token_gnt_090_to_093_v2, token_gnt_094_to_097_v2, token_gnt_098_to_09B_v2, token_gnt_09C_to_09F_v2, token_gnt_0A0_to_0A3_v2, token_gnt_0A4_to_0A7_v2, token_gnt_0A8_to_0AB_v2, token_gnt_0AC_to_0AF_v2, token_gnt_0B0_to_0B3_v2, token_gnt_0B4_to_0B7_v2, token_gnt_0B8_to_0BB_v2, token_gnt_0BC_to_0BF_v2, token_gnt_0C0_to_0C3_v2, token_gnt_0C4_to_0C7_v2, token_gnt_0C8_to_0CB_v2, token_gnt_0CC_to_0CF_v2, token_gnt_0D0_to_0D3_v2, token_gnt_0D4_to_0D7_v2, token_gnt_0D8_to_0DB_v2, token_gnt_0DC_to_0DF_v2, token_gnt_0E0_to_0E3_v2, token_gnt_0E4_to_0E7_v2, token_gnt_0E8_to_0EB_v2, token_gnt_0EC_to_0EF_v2, token_gnt_0F0_to_0F3_v2, token_gnt_0F4_to_0F7_v2, token_gnt_0F8_to_0FB_v2, token_gnt_0FC_to_0FE_v2, token_gnt_0FF_v2, token_100_to_1FF_v2, token_200_to_2FF_v2, token_300_to_3FF_v2, token_400_to_4FF_v2, token_500_to_5FF_v2, token_600_to_6FF_v2, token_700_to_7FF_v2, token_800_to_8FF_v2, token_900_to_9FF_v2, token_A00_to_AFF_v2, token_B00_to_BFF_v2, token_C00_to_CFF_v2, token_D00_to_DFF_v2, token_E00_to_EFF_v2, token_F00_to_FFE_v2, token_FFF_v2	--	Covergroup: trans_dti_translation_token_granted_v2 .
DTI_PORT_MON_COV	trans_dti_translation_token_requested	token_requested	token_requested:token_00, token_01_to_0F, token_10_to_1F, token_20_to_2F, token_30_to_3F, token_40_to_4F, token_50_to_5F, token_60_to_6F, token_70_to_7F, token_80_to_8F, token_90_to_9F, token_A0_to_AF, token_B0_to_BF, token_C0_to_CF, token_D0_to_DF, token_E0_to_EF, token_F0_to_FE, token_FF	--	Covergroup: trans_dti_translation_token_requested .
DTI_PORT_MON_COV	trans_dti_translation_token_requested_v1	token_requested_v1	token_requested_v1:token_000_v1, token_001_to_00F_v1, token_010_to_01F_v1, token_020_to_02F_v1, token_030_to_03F_v1, token_040_to_04F_v1, token_050_to_05F_v1, token_060_to_06F_v1, token_070_to_07F_v1, token_080_to_08F_v1, token_090_to_09F_v1, token_0A0_to_0AF_v1, token_0B0_to_0BF_v1, token_0C0_to_0CF_v1, token_0D0_to_0DF_v1, token_0E0_to_0EF_v1, token_0F0_to_0FE_v1, token_0FF_v1	--	Covergroup: trans_dti_translation_token_requested_v1 .
DTI_PORT_MON_COV	trans_dti_translation_token_requested_v2	token_requested_v2	token_requested_v2:token_000_v2, token_001_to_00F_v2, token_010_to_01F_v2, token_020_to_02F_v2, token_030_to_03F_v2, token_040_to_04F_v2, token_050_to_05F_v2, token_060_to_06F_v2, token_070_to_07F_v2, token_080_to_08F_v2, token_090_to_09F_v2, token_0A0_to_0AF_v2, token_0B0_to_0BF_v2, token_0C0_to_0CF_v2, token_0D0_to_0DF_v2, token_0E0_to_0EF_v2, token_0F0_to_0FE_v2, token_0FF_v2, token_100_to_1FF_v2, token_200_to_2FF_v2, token_300_to_3FF_v2, token_400_to_4FF_v2, token_500_to_5FF_v2, token_600_to_6FF_v2, token_700_to_7FF_v2, token_800_to_8FF_v2, token_900_to_9FF_v2, token_A00_to_AFF_v2, token_B00_to_BFF_v2, token_C00_to_CFF_v2, token_D00_to_DFF_v2, token_E00_to_EFF_v2, token_F00_to_FFE_v2, token_FFF_v2	--	Covergroup: trans_dti_translation_token_requested_v2 .
DTI_PORT_MON_COV	trans_dti_valid_substream	val_sub_strm		--	Covergroup: trans_dti_valid_substream .
DTI_PORT_MON_COV	trans_dti_version_ack	version_ack	version_ack:version_ack_e_b_v1, version_ack_e_b_v2, version_ack_f_b_v3	--	Covergroup : trans_dti_version_ack .
DTI_PORT_MON_COV	trans_dti_version_req	version_req	version_req:version_req_e_b_v1, version_req_e_b_v2, version_req_f_b_v3	--	Covergroup : trans_dti_version_req .

Group

Covergroup

Coverpoints

Bins

Cross Coverage

Description

DTI_PORT_MON_COV

ats_inv_req_dti_operation

ats_operation

ats_operation:ATCI_NOPASID, ATCI_PASID_GLOBAL, ATCI_PASID, ATS_RESERVED_VAL

Covergroup : ats_inv_req_dti_operation

DTI_PORT_MON_COV

ats_inv_req_dti_sid

ats_stream_id

Covergroup : ats_inv_req_dti_sid

DTI_PORT_MON_COV

ats_inv_req_dti_ssid

ats_substream_id

Covergroup : ats_inv_req_dti_ssid

DTI_PORT_MON_COV

ats_inv_req_dti_va_ipa

ats_va_ipa

Covergroup : inv_req_dti_ats_va_ipa

DTI_PORT_MON_COV

inv_req_cross_op_asid_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_asid_inc_aset1

Covergroup : inv_req_cross_op_asid_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_op_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_inc_aset1

Covergroup : inv_req_cross_op_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_op_sid_range

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_sid_range

Covergroup : inv_req_cross_op_sid_range

DTI_PORT_MON_COV

inv_req_cross_op_sid_ssid

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_sid_ssid

Covergroup : inv_req_cross_op_sid_ssid

DTI_PORT_MON_COV

inv_req_cross_op_va_asid_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_va_asid_inc_aset1

Covergroup : inv_req_cross_op_va_asid_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_op_va_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_inc_aset1

Covergroup : inv_req_cross_op_va_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_op_vmid_asid_range_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_vmid_asid_range_inc_aset1

Covergroup : inv_req_cross_op_vmid_asid_range_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_op_vmid_asid_va_range_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_vmid_asid_va_range_inc_aset1

Covergroup : inv_req_cross_op_vmid_asid_va_range_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_op_vmid_ipa_range_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_vmid_ipa_range_inc_aset1

Covergroup : inv_req_cross_op_vmid_ipa_range_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_op_vmid_range_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_vmid_range_inc_aset1

Covergroup : inv_req_cross_op_vmid_range_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_op_vmid_va_range_inc_aset1

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

op_vmid_va_range_inc_aset1

Covergroup : inv_req_cross_op_vmid_va_range_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_scale_num_tg_ttl_range

scale_num_tg_ttl_range

Covergroup : inv_req_cross_scale_num_tg_ttl_sec_sid

DTI_PORT_MON_COV

inv_req_cross_scale_num_tg_ttl_range_asid_inc_aset1

scale_num_tg_ttl_range_asid_inc_aset1

Covergroup : inv_req_cross_scale_num_tg_ttl_range_asid_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_scale_num_tg_ttl_range_asid_vmid_inc_aset1

scale_num_tg_ttl_range_asid_vmid_inc_aset1

Covergroup : inv_req_cross_scale_num_tg_ttl_range_asid_vmid_inc_aset1

DTI_PORT_MON_COV

inv_req_cross_scale_num_tg_ttl_sec_sid

scale_num_tg_ttl_sec_sid

Covergroup : inv_req_cross_scale_num_tg_ttl_range

DTI_PORT_MON_COV

inv_req_dti_asid

asid

Covergroup : inv_req_dti_asid

DTI_PORT_MON_COV

inv_req_dti_inc_aset1

inc_aset1

Covergroup : inv_req_dti_inc_aset1

DTI_PORT_MON_COV

inv_req_dti_num

Covergroup : inv_req_dti_num

DTI_PORT_MON_COV

inv_req_dti_operation

operation

operation:TLBI_S_EL1_ALL, TLBI_S_EL1_VAA, TLBI_S_EL1_ASID, TLBI_S_EL1_VA, TLBI_NS_EL1_ALL, TLBI_NS_EL1_S1_VMID, TLBI_NS_EL1_S12_VMID, TLBI_NS_EL1_VAA, TLBI_NS_EL1_ASID, TLBI_NS_EL1_VA, TLBI_NS_EL1_S2_IPA, TLBI_NS_EL2_ALL, TLBI_NS_EL2_VAA, TLBI_NS_EL2_ASID, TLBI_NS_EL2_VA, TLBI_S_EL3_ALL, TLBI_S_EL3_VA, CFGI_S_ALL, CFGI_S_SID, CFGI_S_SID_SSID, CFGI_NS_ALL, CFGI_NS_SID, CFGI_NS_SID_SSID, INV_ALL, RESERVED_VAL

Covergroup : inv_req_dti_operation

DTI_PORT_MON_COV

inv_req_dti_range

sid_vmid_range

Covergroup : inv_req_dti_range

DTI_PORT_MON_COV

inv_req_dti_scale

scale

Covergroup : inv_req_dti_scale

DTI_PORT_MON_COV

inv_req_dti_sid

stream_id

Covergroup : inv_req_dti_sid

DTI_PORT_MON_COV

inv_req_dti_ssid

substream_id

Covergroup : inv_req_dti_ssid

DTI_PORT_MON_COV

inv_req_dti_translation_granule_size

Covergroup : inv_req_dti_translation_granule_size

DTI_PORT_MON_COV

inv_req_dti_translation_table_level

Covergroup : inv_req_dti_translation_table_level

DTI_PORT_MON_COV

inv_req_dti_va_ipa

addr

Covergroup : inv_req_dti_va_ipa

DTI_PORT_MON_COV

inv_req_dti_vmid

vmid

Covergroup : inv_req_dti_vmid

DTI_PORT_MON_COV

inv_rsp_dti_msg

inv_ack_op

inv_ack_op:inv_ack

Covergroup : inv_rsp_dti_msg

DTI_PORT_MON_COV

page_cross_prg_idx_addr

page_cross_prg_idx_addr

Covergroup : page_cross_prg_idx_addr

DTI_PORT_MON_COV

page_cross_prg_idx_addr_last_sid_ssid_ssv

page_cross_prg_idx_addr_last_sid_ssid_ssv

Covergroup : page_cross_prg_idx_addr_last_sid_ssid_ssv

DTI_PORT_MON_COV

page_cross_prg_idx_resp

page_cross_prg_idx_resp

Covergroup : page_cross_prg_idx_resp

DTI_PORT_MON_COV

page_cross_prg_idx_sid_ssid_ssv

page_cross_prg_idx_sid_ssid_ssv

Covergroup : page_cross_prg_idx_sid_ssid_ssv

DTI_PORT_MON_COV

page_cross_write_read_inst_priv

page_cross_write_read_inst_priv

Covergroup : page_cross_write_read_inst_priv

DTI_PORT_MON_COV

page_cross_write_read_last_sid_ssid_ssv

page_cross_write_read_last_sid_ssid_ssv

Covergroup : page_cross_write_read_last_sid_ssid_ssv

DTI_PORT_MON_COV

sync_req_dti_msg

message_type:condis_req, condis_ack, trans_req, trans_resp, trans_fault, inv_req, inv_ack, sync_req, sync_ack, reg_write, reg_write_ack, reg_read, reg_rdata, imp_def_type1_req, imp_def_type2_req, imp_def_type1_resp, imp_def_type2_resp, ats_condis_req, ats_condis_ack, ats_trans_req, ats_trans_resp, ats_trans_fault, ats_inv_req, ats_inv_ack, ats_sync_req, ats_sync_ack, ats_page_req, ats_page_ack, ats_page_resp, ats_page_respack, ats_inv_comp
sync_req_op:sync_req

Covergroup : sync_req_dti_msg

DTI_PORT_MON_COV

sync_rsp_dti_msg

message_type:condis_req, condis_ack, trans_req, trans_resp, trans_fault, inv_req, inv_ack, sync_req, sync_ack, reg_write, reg_write_ack, reg_read, reg_rdata, imp_def_type1_req, imp_def_type2_req, imp_def_type1_resp, imp_def_type2_resp, ats_condis_req, ats_condis_ack, ats_trans_req, ats_trans_resp, ats_trans_fault, ats_inv_req, ats_inv_ack, ats_sync_req, ats_sync_ack, ats_page_req, ats_page_ack, ats_page_resp, ats_page_respack, ats_inv_comp
sync_rsp_op:sync_ack

Covergroup : sync_rsp_dti_msg

DTI_PORT_MON_COV

trans_cross_allow_x_allow_w_allow_r

trans_cross_allow_x_allow_w_allow_r

Covergroup : trans_cross_allow_x_allow_w_allow_r

DTI_PORT_MON_COV

trans_cross_asid_with_aset

aset_trans_resp_asid

Covergroup : trans_cross_asid_with_aset .

DTI_PORT_MON_COV

trans_cross_attr_ovr_v2_sec_sid_sid

attr_ovr_v2_sec_sid_sid

Covergroup : trans_cross_attr_ovr_v2_sec_sid_sid

DTI_PORT_MON_COV

trans_cross_attr_ovr_v2_sec_sid_sid_ns

attr_ovr_v2_sec_sid_sid_ns

Covergroup : trans_cross_attr_ovr_v2_sec_sid_sid_ns

DTI_PORT_MON_COV

trans_cross_attr_ovr_with_alloccfg_v1

attr_ovr_alloccfg

Covergroup : trans_cross_attr_ovr_with_alloccfg_v1 .

DTI_PORT_MON_COV

trans_cross_attr_ovr_with_alloccfg_v2

attr_ovr_alloccfg

Covergroup : trans_cross_attr_ovr_with_alloccfg_v2 .

DTI_PORT_MON_COV

trans_cross_attr_ovr_with_attr_with_sh_v1

attr_ovr_attr_sh

Covergroup : trans_cross_attr_ovr_with_attr_with_sh_v1 .

DTI_PORT_MON_COV

trans_cross_attr_ovr_with_attr_with_sh_v2

attr_ovr_attr_sh

Covergroup : trans_cross_attr_ovr_with_attr_with_sh_v2 .

DTI_PORT_MON_COV

trans_cross_bp_type_with_bypass

bypass_bp_type

Covergroup : trans_cross_bp_type_with_bypass .

DTI_PORT_MON_COV

trans_cross_condis_req_state_condis_ack_state

state_ack_or_deny

Covergroup: trans_cross_condis_req_state_condis_ack_state .

DTI_PORT_MON_COV

trans_cross_fault_type_with_donot_cache

fault_type_donot_cache

Covergroup : trans_cross_fault_type_with_donot_cache .

DTI_PORT_MON_COV

trans_cross_fault_type_with_donot_cache_v1

fault_type_v1:fault_type_e_NON_ABORT_v1, fault_type_e_ABORT_v1, fault_type_e_STREAM_DISABLED_v1, fault_type_e_GLOBAL_DISABLED_v1

fault_type_donot_cache_v1

Covergroup : trans_cross_fault_type_with_donot_cache_v1 .

DTI_PORT_MON_COV

trans_cross_fault_type_with_donot_cache_v2

fault_type_v2:fault_type_e_NON_ABORT_v2, fault_type_e_ABORT_v2, fault_type_e_STREAM_DISABLED_v2, fault_type_e_GLOBAL_DISABLED_v2, fault_type_e_TRANSLATION_PRI_v2, fault_type_e_TRANSLATION_STALL_v2

fault_type_donot_cache_v2

Covergroup : trans_cross_fault_type_with_donot_cache_v2 .

DTI_PORT_MON_COV

trans_cross_global_ssid_ssv

trans_cross_global_ssid_ssv

Covergroup : trans_cross_global_ssid_ssv

DTI_PORT_MON_COV

trans_cross_global_with_asid

global_asid

Covergroup : trans_cross_global_with_asid .

DTI_PORT_MON_COV

trans_cross_global_with_shareability

global_sh

Covergroup : trans_cross_global_with_shareability .

DTI_PORT_MON_COV

trans_cross_global_with_smmu_stream_world

global_strw

Covergroup : trans_cross_global_with_smmu_stream_world .

DTI_PORT_MON_COV

trans_cross_ind_with_instcfg

inst_data_access:data_access, inst_access

ind_instcfg

Covergroup : trans_cross_ind_with_instcfg .

DTI_PORT_MON_COV

trans_cross_inst_pnu_with_allow_pr_allow_ur_instcfg_privcfg

inst_data_access:data_access, inst_access
priv_unpriv_access:priv_access, unpriv_access

inst_pnu_instcfg_priv_allow_ur_pr

Covergroup : trans_cross_inst_pnu_with_allow_pr_allow_ur_instcfg_privcfg .

DTI_PORT_MON_COV

trans_cross_inst_pnu_with_allow_pw_allow_uw_instcfg_privcfg

inst_data_access:data_access, inst_access
priv_unpriv_access:priv_access, unpriv_access

inst_pnu_instcfg_priv_allow_uw_pw

Covergroup : trans_cross_inst_pnu_with_allow_pw_allow_uw_instcfg_privcfg .

DTI_PORT_MON_COV

trans_cross_inst_pnu_with_allow_px_allow_ux_instcfg_privcfg

inst_data_access:data_access, inst_access
priv_unpriv_access:priv_access, unpriv_access

inst_pnu_instcfg_priv_allow_ux_px

Covergroup : trans_cross_inst_pnu_with_allow_px_allow_ux_instcfg_privcfg .

DTI_PORT_MON_COV

trans_cross_invalidation_range_with_translation_range_with_bypass_0

inval_rng_trans_rng

Covergroup : trans_cross_invalidation_range_with_translation_range_with_bypass_0 .

DTI_PORT_MON_COV

trans_cross_mpamns_sec_sid_part_id_pmg_v1

mpamns_sec_sid_part_id_pmg_v1

Covergroup : trans_cross_mpamns_sec_sid_part_id_pmg_v1

DTI_PORT_MON_COV

trans_cross_mpamns_sec_sid_part_id_pmg_v2

mpamns_v2:mpamns_e_v2
pmg_v2:pmg_e_b

mpamns_sec_sid_part_id_pmg_v2

Covergroup : trans_cross_mpamns_sec_sid_part_id_pmg_v2

DTI_PORT_MON_COV

trans_cross_non_secure_access_with_ind_with_pnu

inst_data_access:data_access, inst_access
priv_unpriv_access:priv_access, unpriv_access

ns_ind_pnu

Covergroup: trans_cross_non_secure_access_with_ind_with_pnu .

DTI_PORT_MON_COV

trans_cross_non_secure_access_with_perm_req_with_instruction_access

inst_data_access:data_access, inst_access

ns_perm_ind

Covergroup : trans_cross_non_secure_access_with_perm_req_with_instruction_access .

DTI_PORT_MON_COV

trans_cross_non_secure_access_with_perm_req_with_privileged_access

priv_unpriv_access:priv_access, unpriv_access

ns_perm_pnu

Covergroup : trans_cross_non_secure_access_with_perm_req_with_privileged_access .

DTI_PORT_MON_COV

trans_cross_non_secure_with_override_non_secure

ns_nsovr

Covergroup : trans_cross_non_secure_with_override_non_secure .

DTI_PORT_MON_COV

trans_cross_ns_inst_priv_with_fault_type_donot_cache

inst_data_access:data_access, inst_access
priv_unpriv_access:priv_access, unpriv_access

ns_inst_priv_fault_type_donot_cache

Covergroup : trans_cross_ns_inst_priv_with_fault_type_donot_cache .

DTI_PORT_MON_COV

trans_cross_ns_inst_priv_with_fault_type_donot_cache_v1

inst_data_access:data_access, inst_access
priv_unpriv_access:priv_access, unpriv_access
fault_type_v1:fault_type_e_NON_ABORT_v1, fault_type_e_ABORT_v1, fault_type_e_STREAM_DISABLED_v1, fault_type_e_GLOBAL_DISABLED_v1

ns_inst_priv_fault_type_donot_cache_v1

Covergroup : trans_cross_ns_inst_priv_with_fault_type_donot_cache_v1 .

DTI_PORT_MON_COV

trans_cross_ns_inst_priv_with_fault_type_donot_cache_v2

inst_data_access:data_access, inst_access
priv_unpriv_access:priv_access, unpriv_access
fault_type_v2:fault_type_e_NON_ABORT_v2, fault_type_e_ABORT_v2, fault_type_e_STREAM_DISABLED_v2, fault_type_e_GLOBAL_DISABLED_v2, fault_type_e_TRANSLATION_PRI_v2, fault_type_e_TRANSLATION_STALL_v2

ns_inst_priv_fault_type_donot_cache_v2

Covergroup : trans_cross_ns_inst_priv_with_fault_type_donot_cache_v2 .

DTI_PORT_MON_COV

trans_cross_ns_with_strw_with_dre

ns_dre_stwr

Covergroup : trans_cross_ns_with_strw_with_dre .

DTI_PORT_MON_COV

trans_cross_pnu_with_privcfg

priv_unpriv_access:priv_access, unpriv_access

priv_privcfg

Covergroup : trans_cross_pnu_with_privcfg .

DTI_PORT_MON_COV

trans_cross_req_ns_with_resp_ns

trans_req_ns_trans_resp_ns

Covergroup : trans_cross_req_ns_with_resp_ns .

DTI_PORT_MON_COV

trans_cross_secure_streamid_with_non_secure_access

secsid_ns

Covergroup : trans_cross_secure_streamid_with_non_secure_access .

DTI_PORT_MON_COV

trans_cross_secure_streamid_with_streamid

secsid_sid

Covergroup : trans_cross_secure_streamid_with_streamid.

DTI_PORT_MON_COV

trans_cross_shareability_with_translation_attribute

sh_trans_attr

Covergroup : trans_cross_shareability_with_translation_attribute .

DTI_PORT_MON_COV

trans_cross_speculative_with_read_write_access

speculative_rnw

Covergroup : trans_cross_speculative_with_read_write_access .

DTI_PORT_MON_COV

trans_cross_sub_streamid_with_valid_substream

ssid_ssv

Covergroup : trans_cross_sub_streamid_with_valid_substream .

DTI_PORT_MON_COV

trans_cross_tok_trans_req_tok_trans_gnt

token_granted:token_gnt_00, token_gnt_01_to_03, token_gnt_04_to_07, token_gnt_08_to_0B, token_gnt_0C_to_0F, token_gnt_10_to_13, token_gnt_14_to_17, token_gnt_18_to_1B, token_gnt_1C_to_1F, token_gnt_20_to_23, token_gnt_24_to_27, token_gnt_28_to_2B, token_gnt_2C_to_2F, token_gnt_30_to_33, token_gnt_34_to_37, token_gnt_38_to_3B, token_gnt_3C_to_3F, token_gnt_40_to_43, token_gnt_44_to_47, token_gnt_48_to_4B, token_gnt_4C_to_4F, token_gnt_50_to_53, token_gnt_54_to_57, token_gnt_58_to_5B, token_gnt_5C_to_5F, token_gnt_60_to_63, token_gnt_64_to_67, token_gnt_68_to_6B, token_gnt_6C_to_6F, token_gnt_70_to_73, token_gnt_74_to_77, token_gnt_78_to_7B, token_gnt_7C_to_7F, token_gnt_80_to_83, token_gnt_84_to_87, token_gnt_88_to_8B, token_gnt_8C_to_8F, token_gnt_90_to_93, token_gnt_94_to_97, token_gnt_98_to_9B, token_gnt_9C_to_9F, token_gnt_A0_to_A3, token_gnt_A4_to_A7, token_gnt_A8_to_AB, token_gnt_AC_to_AF, token_gnt_B0_to_B3, token_gnt_B4_to_B7, token_gnt_B8_to_BB, token_gnt_BC_to_BF, token_gnt_C0_to_C3, token_gnt_C4_to_C7, token_gnt_C8_to_CB, token_gnt_CC_to_CF, token_gnt_D0_to_D3, token_gnt_D4_to_D7, token_gnt_D8_to_DB, token_gnt_DC_to_DF, token_gnt_E0_to_E3, token_gnt_E4_to_E7, token_gnt_E8_to_EB, token_gnt_EC_to_EF, token_gnt_F0_to_F3, token_gnt_F4_to_F7, token_gnt_F8_to_FB, token_gnt_FC_to_FE, token_gnt_FF
token_requested:token_00, token_01_to_0F, token_10_to_1F, token_20_to_2F, token_30_to_3F, token_40_to_4F, token_50_to_5F, token_60_to_6F, token_70_to_7F, token_80_to_8F, token_90_to_9F, token_A0_to_AF, token_B0_to_BF, token_C0_to_CF, token_D0_to_DF, token_E0_to_EF, token_F0_to_FE, token_FF

tok_req_tok_gnt

Covergroup: trans_cross_tok_trans_req_tok_trans_gnt .

DTI_PORT_MON_COV

trans_cross_tok_trans_req_tok_trans_gnt_v1

token_granted_v1:token_gnt_000_v1, token_gnt_001_to_003_v1, token_gnt_004_to_007_v1, token_gnt_008_to_00B_v1, token_gnt_00C_to_00F_v1, token_gnt_010_to_013_v1, token_gnt_014_to_017_v1, token_gnt_018_to_01B_v1, token_gnt_01C_to_01F_v1, token_gnt_020_to_023_v1, token_gnt_024_to_027_v1, token_gnt_028_to_02B_v1, token_gnt_02C_to_02F_v1, token_gnt_030_to_033_v1, token_gnt_034_to_037_v1, token_gnt_038_to_03B_v1, token_gnt_03C_to_03F_v1, token_gnt_040_to_043_v1, token_gnt_044_to_047_v1, token_gnt_048_to_04B_v1, token_gnt_04C_to_04F_v1, token_gnt_050_to_053_v1, token_gnt_054_to_057_v1, token_gnt_058_to_05B_v1, token_gnt_05C_to_05F_v1, token_gnt_060_to_063_v1, token_gnt_064_to_067_v1, token_gnt_068_to_06B_v1, token_gnt_06C_to_06F_v1, token_gnt_070_to_073_v1, token_gnt_074_to_077_v1, token_gnt_078_to_07B_v1, token_gnt_07C_to_07F_v1, token_gnt_080_to_083_v1, token_gnt_084_to_087_v1, token_gnt_088_to_08B_v1, token_gnt_08C_to_08F_v1, token_gnt_090_to_093_v1, token_gnt_094_to_097_v1, token_gnt_098_to_09B_v1, token_gnt_09C_to_09F_v1, token_gnt_0A0_to_0A3_v1, token_gnt_0A4_to_0A7_v1, token_gnt_0A8_to_0AB_v1, token_gnt_0AC_to_0AF_v1, token_gnt_0B0_to_0B3_v1, token_gnt_0B4_to_0B7_v1, token_gnt_0B8_to_0BB_v1, token_gnt_0BC_to_0BF_v1, token_gnt_0C0_to_0C3_v1, token_gnt_0C4_to_0C7_v1, token_gnt_0C8_to_0CB_v1, token_gnt_0CC_to_0CF_v1, token_gnt_0D0_to_0D3_v1, token_gnt_0D4_to_0D7_v1, token_gnt_0D8_to_0DB_v1, token_gnt_0DC_to_0DF_v1, token_gnt_0E0_to_0E3_v1, token_gnt_0E4_to_0E7_v1, token_gnt_0E8_to_0EB_v1, token_gnt_0EC_to_0EF_v1, token_gnt_0F0_to_0F3_v1, token_gnt_0F4_to_0F7_v1, token_gnt_0F8_to_0FB_v1, token_gnt_0FC_to_0FE_v1, token_gnt_0FF_v1
token_requested_v1:token_000_v1, token_001_to_00F_v1, token_010_to_01F_v1, token_020_to_02F_v1, token_030_to_03F_v1, token_040_to_04F_v1, token_050_to_05F_v1, token_060_to_06F_v1, token_070_to_07F_v1, token_080_to_08F_v1, token_090_to_09F_v1, token_0A0_to_0AF_v1, token_0B0_to_0BF_v1, token_0C0_to_0CF_v1, token_0D0_to_0DF_v1, token_0E0_to_0EF_v1, token_0F0_to_0FE_v1, token_0FF_v1

tok_req_tok_gnt

Covergroup: trans_cross_tok_trans_req_tok_trans_gnt_v1 .

DTI_PORT_MON_COV

trans_cross_tok_trans_req_tok_trans_gnt_v2

token_granted_v2:token_gnt_000_v2, token_gnt_001_to_003_v2, token_gnt_004_to_007_v2, token_gnt_008_to_00B_v2, token_gnt_00C_to_00F_v2, token_gnt_010_to_013_v2, token_gnt_014_to_017_v2, token_gnt_018_to_01B_v2, token_gnt_01C_to_01F_v2, token_gnt_020_to_023_v2, token_gnt_024_to_027_v2, token_gnt_028_to_02B_v2, token_gnt_02C_to_02F_v2, token_gnt_030_to_033_v2, token_gnt_034_to_037_v2, token_gnt_038_to_03B_v2, token_gnt_03C_to_03F_v2, token_gnt_040_to_043_v2, token_gnt_044_to_047_v2, token_gnt_048_to_04B_v2, token_gnt_04C_to_04F_v2, token_gnt_050_to_053_v2, token_gnt_054_to_057_v2, token_gnt_058_to_05B_v2, token_gnt_05C_to_05F_v2, token_gnt_060_to_063_v2, token_gnt_064_to_067_v2, token_gnt_068_to_06B_v2, token_gnt_06C_to_06F_v2, token_gnt_070_to_073_v2, token_gnt_074_to_077_v2, token_gnt_078_to_07B_v2, token_gnt_07C_to_07F_v2, token_gnt_080_to_083_v2, token_gnt_084_to_087_v2, token_gnt_088_to_08B_v2, token_gnt_08C_to_08F_v2, token_gnt_090_to_093_v2, token_gnt_094_to_097_v2, token_gnt_098_to_09B_v2, token_gnt_09C_to_09F_v2, token_gnt_0A0_to_0A3_v2, token_gnt_0A4_to_0A7_v2, token_gnt_0A8_to_0AB_v2, token_gnt_0AC_to_0AF_v2, token_gnt_0B0_to_0B3_v2, token_gnt_0B4_to_0B7_v2, token_gnt_0B8_to_0BB_v2, token_gnt_0BC_to_0BF_v2, token_gnt_0C0_to_0C3_v2, token_gnt_0C4_to_0C7_v2, token_gnt_0C8_to_0CB_v2, token_gnt_0CC_to_0CF_v2, token_gnt_0D0_to_0D3_v2, token_gnt_0D4_to_0D7_v2, token_gnt_0D8_to_0DB_v2, token_gnt_0DC_to_0DF_v2, token_gnt_0E0_to_0E3_v2, token_gnt_0E4_to_0E7_v2, token_gnt_0E8_to_0EB_v2, token_gnt_0EC_to_0EF_v2, token_gnt_0F0_to_0F3_v2, token_gnt_0F4_to_0F7_v2, token_gnt_0F8_to_0FB_v2, token_gnt_0FC_to_0FE_v2, token_gnt_0FF_v2, token_100_to_1FF_v2, token_200_to_2FF_v2, token_300_to_3FF_v2, token_400_to_4FF_v2, token_500_to_5FF_v2, token_600_to_6FF_v2, token_700_to_7FF_v2, token_800_to_8FF_v2, token_900_to_9FF_v2, token_A00_to_AFF_v2, token_B00_to_BFF_v2, token_C00_to_CFF_v2, token_D00_to_DFF_v2, token_E00_to_EFF_v2, token_F00_to_FFE_v2, token_FFF_v2
token_requested_v2:token_000_v2, token_001_to_00F_v2, token_010_to_01F_v2, token_020_to_02F_v2, token_030_to_03F_v2, token_040_to_04F_v2, token_050_to_05F_v2, token_060_to_06F_v2, token_070_to_07F_v2, token_080_to_08F_v2, token_090_to_09F_v2, token_0A0_to_0AF_v2, token_0B0_to_0BF_v2, token_0C0_to_0CF_v2, token_0D0_to_0DF_v2, token_0E0_to_0EF_v2, token_0F0_to_0FE_v2, token_0FF_v2, token_100_to_1FF_v2, token_200_to_2FF_v2, token_300_to_3FF_v2, token_400_to_4FF_v2, token_500_to_5FF_v2, token_600_to_6FF_v2, token_700_to_7FF_v2, token_800_to_8FF_v2, token_900_to_9FF_v2, token_A00_to_AFF_v2, token_B00_to_BFF_v2, token_C00_to_CFF_v2, token_D00_to_DFF_v2, token_E00_to_EFF_v2, token_F00_to_FFE_v2, token_FFF_v2

tok_req_tok_gnt

Covergroup: trans_cross_tok_trans_req_tok_trans_gnt_v2 .

DTI_PORT_MON_COV

trans_dti_allow_data_read_access

allow_r

Covergroup :trans_dti_allow_data_read_access .

DTI_PORT_MON_COV

trans_dti_allow_data_write_access

allow_w

Covergroup :trans_dti_allow_data_write_access .

DTI_PORT_MON_COV

trans_dti_allow_instruction_read_access

allow_x

Covergroup :trans_dti_allow_instruction_read_access .

DTI_PORT_MON_COV

trans_dti_allow_non_sec_inst_reads

allow_nsx

Covergroup :trans_dti_allow_non_sec_inst_reads .

DTI_PORT_MON_COV

trans_dti_allow_priv_inst_reads

allow_px

Covergroup :trans_dti_allow_priv_inst_reads .

DTI_PORT_MON_COV

trans_dti_allow_priv_read_data_access

allow_pr

Covergroup :trans_dti_allow_priv_read_data_access .

DTI_PORT_MON_COV

trans_dti_allow_priv_write_data_access

allow_pw

Covergroup :trans_dti_allow_priv_write_data_access .

DTI_PORT_MON_COV

trans_dti_allow_unpriv_data_read_access

allow_ur

Covergroup :trans_dti_allow_unpriv_data_read_access .

DTI_PORT_MON_COV

trans_dti_allow_unpriv_data_write_access

allow_uw

Covergroup :trans_dti_allow_unpriv_data_write_access .

DTI_PORT_MON_COV

trans_dti_allow_unpriv_instruction_reads

allow_ux

Covergroup :trans_dti_allow_unpriv_instruction_reads .

DTI_PORT_MON_COV

trans_dti_ats_condis_req_no_trans

ats_no_trans

ats_no_trans:no_trans_e

Covergroup : trans_dti_ats_condis_req_no_trans

DTI_PORT_MON_COV

trans_dti_ats_error

ats_error

Covergroup : trans_dti_ats_error .

DTI_PORT_MON_COV

trans_dti_ats_error_v3

ats_error

Covergroup : trans_dti_ats_error_v3 .

DTI_PORT_MON_COV

trans_dti_ats_fault_type

ats_fault_type

Covergroup :trans_dti_ats_fault_type .

DTI_PORT_MON_COV

trans_dti_ats_page_execute_access

ats_page_execute_access

Covergroup : trans_dti_ats_page_execute_access

DTI_PORT_MON_COV

trans_dti_ats_page_last

ats_last

Covergroup : trans_dti_ats_page_last

DTI_PORT_MON_COV

trans_dti_ats_page_priv_access

ats_page_priv_access

Covergroup : trans_dti_ats_page_priv_access

DTI_PORT_MON_COV

trans_dti_ats_page_read_access

ats_page_read_access

Covergroup : trans_dti_ats_page_read_access

DTI_PORT_MON_COV

trans_dti_ats_page_request_group

ats_page_request_group

Covergroup : trans_dti_ats_page_request_group

DTI_PORT_MON_COV

trans_dti_ats_page_resp

ats_page_resp

Covergroup : trans_dti_ats_page_resp

DTI_PORT_MON_COV

trans_dti_ats_page_stream_id

ats_page_req_strm_id

Covergroup : trans_dti_ats_page_stream_id

DTI_PORT_MON_COV

trans_dti_ats_page_sub_stream_id

ats_page_req_sub_strm_id

Covergroup : trans_dti_ats_page_sub_stream_id

DTI_PORT_MON_COV

trans_dti_ats_page_valid_substream

ats_page_req_val_sub_strm

Covergroup : trans_dti_ats_page_valid_substream

DTI_PORT_MON_COV

trans_dti_ats_page_write_access

ats_page_write_access

Covergroup : trans_dti_ats_page_write_access

DTI_PORT_MON_COV

trans_dti_ats_range

ats_rage

Covergroup : trans_dti_ats_range

DTI_PORT_MON_COV

trans_dti_ats_trans_resp_ats_memory_type_attributes_v1

ats_no_trans_v1

Covergroup : trans_dti_ats_trans_resp_ats_memory_type_attributes_v1

DTI_PORT_MON_COV

trans_dti_ats_trans_resp_ats_memory_type_attributes_v2

ats_no_trans_v2

ats_no_trans_v2:ama_v2

Covergroup : trans_dti_ats_trans_resp_ats_memory_type_attributes_v2

DTI_PORT_MON_COV

trans_dti_ats_trans_resp_cxl_io_v1

ats_cxl_io_v1

Covergroup : trans_dti_ats_trans_resp_cxl_io_v1

DTI_PORT_MON_COV

trans_dti_ats_trans_resp_cxl_io_v2

ats_cxl_io_v2

ats_cxl_io_v2:cxl_io_v2

Covergroup : trans_dti_ats_trans_resp_cxl_io_v2

DTI_PORT_MON_COV

trans_dti_ats_translated

atst

Covergroup :trans_dti_ats_translated .

DTI_PORT_MON_COV

trans_dti_ats_translation_range_with_bypass_0

trans_ats_rng_bypass_0

Covergroup :trans_dti_ats_translation_range_with_bypass_0 .

DTI_PORT_MON_COV

trans_dti_ats_translation_range_with_bypass_1_v1

trans_ats_rng_bypass_1_v1

Covergroup :trans_dti_ats_translation_range_with_bypass_1_v1 .

DTI_PORT_MON_COV

trans_dti_ats_translation_range_with_bypass_1_v2

trans_ats_rng_bypass_1_v2

Covergroup :trans_dti_ats_translation_range_with_bypass_1_v2 .

DTI_PORT_MON_COV

trans_dti_ats_translation_resp_output_address

ats_trans_resp_addr

Covergroup: trans_dti_ats_translation_resp_output_address. User can configure automatic bins for this covergroup by setting macro: SVT_DTI_DTI_TRANS_RESP_ADDR_AUTO_BINS. Default value of SVT_DTI_DTI_TRANS_RESP_ADDR_AUTO_BINS macro is 256 .

DTI_PORT_MON_COV

trans_dti_ats_untranslated

ats_untranslated

Covergroup :trans_dti_ats_untranslated .

DTI_PORT_MON_COV

trans_dti_ats_write_access

Covergroup :trans_dti_ats_write_access .

DTI_PORT_MON_COV

trans_dti_bypassed_translation

bypass

Covergroup: trans_dti_bypassed_translation .

DTI_PORT_MON_COV

trans_dti_combined_allocate_v1

comb_alloc_v1

Covergroup: trans_dti_combined_allocate_v1 .

DTI_PORT_MON_COV

trans_dti_combined_allocate_v2

comb_alloc_v2

comb_alloc_v2:comb_alloc_e_b_v2

Covergroup: trans_dti_combined_allocate_v2 .

DTI_PORT_MON_COV

trans_dti_combined_memory_type_v1

comb_mt_v1

Covergroup: trans_dti_combined_memory_type_v1 .

DTI_PORT_MON_COV

trans_dti_combined_memory_type_v2

comb_mt

comb_mt:comb_mt_e_b_v2

Covergroup: trans_dti_combined_memory_type_v2 .

DTI_PORT_MON_COV

trans_dti_combined_shareability_v1

comb_sh_v1

Covergroup: trans_dti_combined_shareability_v1 .

DTI_PORT_MON_COV

trans_dti_combined_shareability_v2

comb_sh_v2

comb_sh_v2:comb_sh_e_v2

Covergroup: trans_dti_combined_shareability_v2 .

DTI_PORT_MON_COV

trans_dti_condis_ack_state_accepted

con_accept

Covergroup: trans_dti_condis_ack_state_accepted .

DTI_PORT_MON_COV

trans_dti_condis_req_state_requested

con_req

Covergroup: trans_dti_condis_req_state_requested .

DTI_PORT_MON_COV

trans_dti_contiguous_stream_id

contiguous_stream

Covergroup: trans_dti_contiguous_stream_id .

DTI_PORT_MON_COV

trans_dti_ctxtattr

ctxtattr

Covergroup: trans_dti_ctxtattr .

DTI_PORT_MON_COV

trans_dti_destructive_reads_permitted

Covergroup :trans_dti_destructive_reads_permitted .

DTI_PORT_MON_COV

trans_dti_directed_cache_prefetch

Covergroup :trans_dti_directed_cache_prefetch .

DTI_PORT_MON_COV

trans_dti_donot_cache

dont_cache

Covergroup: trans_dti_donot_cache .

DTI_PORT_MON_COV

trans_dti_flow_v1

flow_v1

Covergroup: trans_dti_flow_v1 .

DTI_PORT_MON_COV

trans_dti_flow_v2

flow_v2

Covergroup: trans_dti_flow_v2 .

DTI_PORT_MON_COV

trans_dti_global_valid

global_val

Covergroup :trans_dti_global_valid.

DTI_PORT_MON_COV

trans_dti_hardware_attributes

hwattr

Covergroup :trans_dti_hardware_attributes .

DTI_PORT_MON_COV

trans_dti_inst_data_access

inst_data_access

inst_data_access:data_access, inst_access

Covergroup: trans_dti_inst_data_access .

DTI_PORT_MON_COV

trans_dti_invalidation_range

inval_rng

Covergroup :trans_dti_invalidation_range .

DTI_PORT_MON_COV

trans_dti_invalidation_token_granted

inv_token_req

inv_token_req:token_0, token_1_to_3, token_4_to_6, token_7_to_9, token_A_to_C, token_D_to_E, token_F

Covergroup: trans_dti_invalidation_token_granted .

DTI_PORT_MON_COV

trans_dti_message_type

message_type

message_type:condis_req, condis_ack, trans_req, trans_resp, trans_fault, inv_req, inv_ack, sync_req, sync_ack, reg_write, reg_write_ack, reg_read, reg_rdata, imp_def_type1_req, imp_def_type2_req, imp_def_type1_resp, imp_def_type2_resp, ats_condis_req, ats_condis_ack, ats_trans_req, ats_trans_resp, ats_trans_fault, ats_inv_req, ats_inv_ack, ats_sync_req, ats_sync_ack, ats_page_req, ats_page_ack, ats_page_resp, ats_page_respack, ats_inv_comp

Covergroup: trans_dti_message_type

Coverpoints:

cov_message_type: Captures the message type seen in transaction

DTI_PORT_MON_COV

trans_dti_mpamns_v1

mpamns_v1

Covergroup: trans_dti_mpamns_v1 .

DTI_PORT_MON_COV

trans_dti_mpamns_v2

mpamns_v2

mpamns_v2:mpamns_e_v2

Covergroup: trans_dti_mpamns_v2 .

DTI_PORT_MON_COV

trans_dti_output_address_size

output_address_size

output_address_size:size_32_bits, size_36_bits, size_40_bits, size_42_bits, size_44_bits, size_48_bits, size_52_bits

Covergroup: trans_dti_output_address_size .

DTI_PORT_MON_COV

trans_dti_override_allocation

alloccfg

Covergroup: trans_dti_override_allocation .

DTI_PORT_MON_COV

trans_dti_override_attributes_v1

ovr_attributes_v1

Covergroup: trans_dti_override_attributes_v1 .

DTI_PORT_MON_COV

trans_dti_override_attributes_v2

ovr_attributes_v2

Covergroup: trans_dti_override_attributes_v2 .

DTI_PORT_MON_COV

trans_dti_override_instruction_data_access

ovr_rd_ind

Covergroup: trans_dti_override_instruction_data_access .

DTI_PORT_MON_COV

trans_dti_override_non_secure_access

nsovr

Covergroup: trans_dti_override_non_secure_access .

DTI_PORT_MON_COV

trans_dti_override_privileged_access

ovr_rd_pnu

Covergroup: trans_dti_override_privileged_access .

DTI_PORT_MON_COV

trans_dti_part_id_v1

part_id_v1

Covergroup: trans_dti_part_id_v1 .

DTI_PORT_MON_COV

trans_dti_part_id_v2

part_id_v2

Covergroup: trans_dti_part_id_v2 .

DTI_PORT_MON_COV

trans_dti_permissions_required

permission_req

Covergroup: trans_dti_permissions_required .

DTI_PORT_MON_COV

trans_dti_pmg_v1

pmg_v1

Covergroup: trans_dti_pmg_v1 .

DTI_PORT_MON_COV

trans_dti_pmg_v2

pmg_v2

pmg_v2:pmg_e_b

Covergroup: trans_dti_pmg_v2 .

DTI_PORT_MON_COV

trans_dti_priv_unpriv_access

priv_unpriv_access

priv_unpriv_access:priv_access, unpriv_access

Covergroup: trans_dti_priv_unpriv_access .

DTI_PORT_MON_COV

trans_dti_protocol

protocol

protocol:protocol_tbu, protocol_ats

Covergroup : trans_dti_protocol .

DTI_PORT_MON_COV

trans_dti_quality_of_service

quality_of_service

quality_of_service:qos

Covergroup: trans_dti_quality_of_service .

DTI_PORT_MON_COV

trans_dti_register_access_supported

reg_access_supported

Covergroup: trans_dti_register_access_supported .

DTI_PORT_MON_COV

trans_dti_req_input_address

trans_req_addr

Covergroup: trans_dti_req_input_address User can configure automatic bins for this covergroup by setting macro: SVT_DTI_DTI_TRANS_REQ_ADDR_AUTO_BINS. Default value of SVT_DTI_DTI_TRANS_REQ_ADDR_AUTO_BINS macro is 256 .

DTI_PORT_MON_COV

trans_dti_secure_non_secure_access

sec_nsec_access

Covergroup: trans_dti_secure_non_secure_access .

DTI_PORT_MON_COV

trans_dti_secure_read_write_access

read_write_access

Covergroup: trans_dti_secure_read_write_access .

DTI_PORT_MON_COV

trans_dti_secure_stream_id

sec_sid

Covergroup: trans_dti_secure_stream_id .

DTI_PORT_MON_COV

trans_dti_shareability_set

aset

Covergroup: trans_dti_shareability_set .

DTI_PORT_MON_COV

trans_dti_smmu_stream_world

strw

Covergroup: trans_dti_smmu_stream_world .

DTI_PORT_MON_COV

trans_dti_speculative_translation_request

speculative

Covergroup: trans_dti_speculative_translation_request .

DTI_PORT_MON_COV

trans_dti_stage1_hardware_attributes

s1hwattr

Covergroup :trans_dti_stage1_hardware_attributes .

DTI_PORT_MON_COV

trans_dti_stage2_hardware_attributes

s2hwattr

Covergroup :trans_dti_stage2_hardware_attributes .

DTI_PORT_MON_COV

trans_dti_stream_id

strm_id

Covergroup: trans_dti_stream_id .

DTI_PORT_MON_COV

trans_dti_sub_stream_id

sub_strm_id

Covergroup: trans_dti_sub_stream_id .

DTI_PORT_MON_COV

trans_dti_sup_pri

sup_pri

Covergroup : trans_dti_sup_pri .

DTI_PORT_MON_COV

trans_dti_tbu_fault_type

fault_type

Covergroup :trans_dti_tbu_fault_type .

DTI_PORT_MON_COV

trans_dti_tbu_fault_type_v1

fault_type_v1

fault_type_v1:fault_type_e_NON_ABORT_v1, fault_type_e_ABORT_v1, fault_type_e_STREAM_DISABLED_v1, fault_type_e_GLOBAL_DISABLED_v1

Covergroup :trans_dti_tbu_fault_type_v1 .

DTI_PORT_MON_COV

trans_dti_tbu_fault_type_v2

fault_type_v2

fault_type_v2:fault_type_e_NON_ABORT_v2, fault_type_e_ABORT_v2, fault_type_e_STREAM_DISABLED_v2, fault_type_e_GLOBAL_DISABLED_v2, fault_type_e_TRANSLATION_PRI_v2, fault_type_e_TRANSLATION_STALL_v2

Covergroup :trans_dti_tbu_fault_type_v2 .

DTI_PORT_MON_COV

trans_dti_translation_attributes

trans_attr

Covergroup: trans_dti_translation_attributes .

DTI_PORT_MON_COV

trans_dti_translation_ids

trans_id

trans_id:ids

Covergroup: trans_dti_translation_ids .

DTI_PORT_MON_COV

trans_dti_translation_ids_v1

trans_id_v1

trans_id_v1:ids_v1

Covergroup: trans_dti_translation_ids_v1 .

DTI_PORT_MON_COV

trans_dti_translation_ids_v2

trans_id_v2

trans_id_v2:ids_v2

Covergroup: trans_dti_translation_ids_v2 .

DTI_PORT_MON_COV

trans_dti_translation_range_with_bypass_0

trans_rng_bypass_0

Covergroup :trans_dti_translation_range_with_bypass_0 .

DTI_PORT_MON_COV

trans_dti_translation_range_with_bypass_1

trans_rng_bypass_1

Covergroup :trans_dti_translation_range_with_bypass_1 .

DTI_PORT_MON_COV

trans_dti_translation_resp_asid

trans_resp_asid

Covergroup: trans_dti_translation_resp_asid .

DTI_PORT_MON_COV

trans_dti_translation_resp_non_secure_access

trans_resp_ns

Covergroup :trans_dti_translation_resp_non_secure_access .

DTI_PORT_MON_COV

trans_dti_translation_resp_output_address

trans_resp_addr

Covergroup: trans_dti_translation_resp_output_address. User can configure automatic bins for this covergroup by setting macro: SVT_DTI_DTI_TRANS_RESP_ADDR_AUTO_BINS. Default value of SVT_DTI_DTI_TRANS_RESP_ADDR_AUTO_BINS macro is 256 .

DTI_PORT_MON_COV

trans_dti_translation_resp_tbi

Covergroup :trans_dti_translation_resp_tbi .

DTI_PORT_MON_COV

trans_dti_translation_response_vmid

trans_resp_vmid

Covergroup: trans_dti_translation_response_vmid .

DTI_PORT_MON_COV

trans_dti_translation_scope

bp_type

Covergroup: trans_dti_translation_scope .

DTI_PORT_MON_COV

trans_dti_translation_shareability

Covergroup: trans_dti_translation_shareability .

DTI_PORT_MON_COV

trans_dti_translation_token_granted

token_granted

token_granted:token_gnt_00, token_gnt_01_to_03, token_gnt_04_to_07, token_gnt_08_to_0B, token_gnt_0C_to_0F, token_gnt_10_to_13, token_gnt_14_to_17, token_gnt_18_to_1B, token_gnt_1C_to_1F, token_gnt_20_to_23, token_gnt_24_to_27, token_gnt_28_to_2B, token_gnt_2C_to_2F, token_gnt_30_to_33, token_gnt_34_to_37, token_gnt_38_to_3B, token_gnt_3C_to_3F, token_gnt_40_to_43, token_gnt_44_to_47, token_gnt_48_to_4B, token_gnt_4C_to_4F, token_gnt_50_to_53, token_gnt_54_to_57, token_gnt_58_to_5B, token_gnt_5C_to_5F, token_gnt_60_to_63, token_gnt_64_to_67, token_gnt_68_to_6B, token_gnt_6C_to_6F, token_gnt_70_to_73, token_gnt_74_to_77, token_gnt_78_to_7B, token_gnt_7C_to_7F, token_gnt_80_to_83, token_gnt_84_to_87, token_gnt_88_to_8B, token_gnt_8C_to_8F, token_gnt_90_to_93, token_gnt_94_to_97, token_gnt_98_to_9B, token_gnt_9C_to_9F, token_gnt_A0_to_A3, token_gnt_A4_to_A7, token_gnt_A8_to_AB, token_gnt_AC_to_AF, token_gnt_B0_to_B3, token_gnt_B4_to_B7, token_gnt_B8_to_BB, token_gnt_BC_to_BF, token_gnt_C0_to_C3, token_gnt_C4_to_C7, token_gnt_C8_to_CB, token_gnt_CC_to_CF, token_gnt_D0_to_D3, token_gnt_D4_to_D7, token_gnt_D8_to_DB, token_gnt_DC_to_DF, token_gnt_E0_to_E3, token_gnt_E4_to_E7, token_gnt_E8_to_EB, token_gnt_EC_to_EF, token_gnt_F0_to_F3, token_gnt_F4_to_F7, token_gnt_F8_to_FB, token_gnt_FC_to_FE, token_gnt_FF

Covergroup: trans_dti_translation_token_granted .

DTI_PORT_MON_COV

trans_dti_translation_token_granted_v1

token_granted_v1

token_granted_v1:token_gnt_000_v1, token_gnt_001_to_003_v1, token_gnt_004_to_007_v1, token_gnt_008_to_00B_v1, token_gnt_00C_to_00F_v1, token_gnt_010_to_013_v1, token_gnt_014_to_017_v1, token_gnt_018_to_01B_v1, token_gnt_01C_to_01F_v1, token_gnt_020_to_023_v1, token_gnt_024_to_027_v1, token_gnt_028_to_02B_v1, token_gnt_02C_to_02F_v1, token_gnt_030_to_033_v1, token_gnt_034_to_037_v1, token_gnt_038_to_03B_v1, token_gnt_03C_to_03F_v1, token_gnt_040_to_043_v1, token_gnt_044_to_047_v1, token_gnt_048_to_04B_v1, token_gnt_04C_to_04F_v1, token_gnt_050_to_053_v1, token_gnt_054_to_057_v1, token_gnt_058_to_05B_v1, token_gnt_05C_to_05F_v1, token_gnt_060_to_063_v1, token_gnt_064_to_067_v1, token_gnt_068_to_06B_v1, token_gnt_06C_to_06F_v1, token_gnt_070_to_073_v1, token_gnt_074_to_077_v1, token_gnt_078_to_07B_v1, token_gnt_07C_to_07F_v1, token_gnt_080_to_083_v1, token_gnt_084_to_087_v1, token_gnt_088_to_08B_v1, token_gnt_08C_to_08F_v1, token_gnt_090_to_093_v1, token_gnt_094_to_097_v1, token_gnt_098_to_09B_v1, token_gnt_09C_to_09F_v1, token_gnt_0A0_to_0A3_v1, token_gnt_0A4_to_0A7_v1, token_gnt_0A8_to_0AB_v1, token_gnt_0AC_to_0AF_v1, token_gnt_0B0_to_0B3_v1, token_gnt_0B4_to_0B7_v1, token_gnt_0B8_to_0BB_v1, token_gnt_0BC_to_0BF_v1, token_gnt_0C0_to_0C3_v1, token_gnt_0C4_to_0C7_v1, token_gnt_0C8_to_0CB_v1, token_gnt_0CC_to_0CF_v1, token_gnt_0D0_to_0D3_v1, token_gnt_0D4_to_0D7_v1, token_gnt_0D8_to_0DB_v1, token_gnt_0DC_to_0DF_v1, token_gnt_0E0_to_0E3_v1, token_gnt_0E4_to_0E7_v1, token_gnt_0E8_to_0EB_v1, token_gnt_0EC_to_0EF_v1, token_gnt_0F0_to_0F3_v1, token_gnt_0F4_to_0F7_v1, token_gnt_0F8_to_0FB_v1, token_gnt_0FC_to_0FE_v1, token_gnt_0FF_v1

Covergroup: trans_dti_translation_token_granted_v1 .

DTI_PORT_MON_COV

trans_dti_translation_token_granted_v2

token_granted_v2

token_granted_v2:token_gnt_000_v2, token_gnt_001_to_003_v2, token_gnt_004_to_007_v2, token_gnt_008_to_00B_v2, token_gnt_00C_to_00F_v2, token_gnt_010_to_013_v2, token_gnt_014_to_017_v2, token_gnt_018_to_01B_v2, token_gnt_01C_to_01F_v2, token_gnt_020_to_023_v2, token_gnt_024_to_027_v2, token_gnt_028_to_02B_v2, token_gnt_02C_to_02F_v2, token_gnt_030_to_033_v2, token_gnt_034_to_037_v2, token_gnt_038_to_03B_v2, token_gnt_03C_to_03F_v2, token_gnt_040_to_043_v2, token_gnt_044_to_047_v2, token_gnt_048_to_04B_v2, token_gnt_04C_to_04F_v2, token_gnt_050_to_053_v2, token_gnt_054_to_057_v2, token_gnt_058_to_05B_v2, token_gnt_05C_to_05F_v2, token_gnt_060_to_063_v2, token_gnt_064_to_067_v2, token_gnt_068_to_06B_v2, token_gnt_06C_to_06F_v2, token_gnt_070_to_073_v2, token_gnt_074_to_077_v2, token_gnt_078_to_07B_v2, token_gnt_07C_to_07F_v2, token_gnt_080_to_083_v2, token_gnt_084_to_087_v2, token_gnt_088_to_08B_v2, token_gnt_08C_to_08F_v2, token_gnt_090_to_093_v2, token_gnt_094_to_097_v2, token_gnt_098_to_09B_v2, token_gnt_09C_to_09F_v2, token_gnt_0A0_to_0A3_v2, token_gnt_0A4_to_0A7_v2, token_gnt_0A8_to_0AB_v2, token_gnt_0AC_to_0AF_v2, token_gnt_0B0_to_0B3_v2, token_gnt_0B4_to_0B7_v2, token_gnt_0B8_to_0BB_v2, token_gnt_0BC_to_0BF_v2, token_gnt_0C0_to_0C3_v2, token_gnt_0C4_to_0C7_v2, token_gnt_0C8_to_0CB_v2, token_gnt_0CC_to_0CF_v2, token_gnt_0D0_to_0D3_v2, token_gnt_0D4_to_0D7_v2, token_gnt_0D8_to_0DB_v2, token_gnt_0DC_to_0DF_v2, token_gnt_0E0_to_0E3_v2, token_gnt_0E4_to_0E7_v2, token_gnt_0E8_to_0EB_v2, token_gnt_0EC_to_0EF_v2, token_gnt_0F0_to_0F3_v2, token_gnt_0F4_to_0F7_v2, token_gnt_0F8_to_0FB_v2, token_gnt_0FC_to_0FE_v2, token_gnt_0FF_v2, token_100_to_1FF_v2, token_200_to_2FF_v2, token_300_to_3FF_v2, token_400_to_4FF_v2, token_500_to_5FF_v2, token_600_to_6FF_v2, token_700_to_7FF_v2, token_800_to_8FF_v2, token_900_to_9FF_v2, token_A00_to_AFF_v2, token_B00_to_BFF_v2, token_C00_to_CFF_v2, token_D00_to_DFF_v2, token_E00_to_EFF_v2, token_F00_to_FFE_v2, token_FFF_v2

Covergroup: trans_dti_translation_token_granted_v2 .

DTI_PORT_MON_COV

trans_dti_translation_token_requested

token_requested

token_requested:token_00, token_01_to_0F, token_10_to_1F, token_20_to_2F, token_30_to_3F, token_40_to_4F, token_50_to_5F, token_60_to_6F, token_70_to_7F, token_80_to_8F, token_90_to_9F, token_A0_to_AF, token_B0_to_BF, token_C0_to_CF, token_D0_to_DF, token_E0_to_EF, token_F0_to_FE, token_FF

Covergroup: trans_dti_translation_token_requested .

DTI_PORT_MON_COV

trans_dti_translation_token_requested_v1

token_requested_v1

token_requested_v1:token_000_v1, token_001_to_00F_v1, token_010_to_01F_v1, token_020_to_02F_v1, token_030_to_03F_v1, token_040_to_04F_v1, token_050_to_05F_v1, token_060_to_06F_v1, token_070_to_07F_v1, token_080_to_08F_v1, token_090_to_09F_v1, token_0A0_to_0AF_v1, token_0B0_to_0BF_v1, token_0C0_to_0CF_v1, token_0D0_to_0DF_v1, token_0E0_to_0EF_v1, token_0F0_to_0FE_v1, token_0FF_v1

Covergroup: trans_dti_translation_token_requested_v1 .

DTI_PORT_MON_COV

trans_dti_translation_token_requested_v2

token_requested_v2

token_requested_v2:token_000_v2, token_001_to_00F_v2, token_010_to_01F_v2, token_020_to_02F_v2, token_030_to_03F_v2, token_040_to_04F_v2, token_050_to_05F_v2, token_060_to_06F_v2, token_070_to_07F_v2, token_080_to_08F_v2, token_090_to_09F_v2, token_0A0_to_0AF_v2, token_0B0_to_0BF_v2, token_0C0_to_0CF_v2, token_0D0_to_0DF_v2, token_0E0_to_0EF_v2, token_0F0_to_0FE_v2, token_0FF_v2, token_100_to_1FF_v2, token_200_to_2FF_v2, token_300_to_3FF_v2, token_400_to_4FF_v2, token_500_to_5FF_v2, token_600_to_6FF_v2, token_700_to_7FF_v2, token_800_to_8FF_v2, token_900_to_9FF_v2, token_A00_to_AFF_v2, token_B00_to_BFF_v2, token_C00_to_CFF_v2, token_D00_to_DFF_v2, token_E00_to_EFF_v2, token_F00_to_FFE_v2, token_FFF_v2

Covergroup: trans_dti_translation_token_requested_v2 .

DTI_PORT_MON_COV

trans_dti_valid_substream