VIP Smartsearch

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  • VIP Smartsearch is a framework that supports search within VIP reference documents using query in natural language. It facilitates reordering of search results and keeps record of user’s decision for the ordering of result display and applies that in search of same query on subsequent usage.

  • How to download VIP smartsearch?

    1. Get VIP Smartsearch (Available as a seperate run file).
    2. Set environment variable 
      DESIGNWARE_HOME
      to required designware home location where VIP Smartsearch should be downloaded.
    3. Run 
      vip_smartsearch_<version>.run
      file.
      VIP Smartsearch will be downloaded to the location 
      $DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>

  • How to install VIP Smartsearch?

    Please refer to the file 
    VIP_Smartsearch_installation_and_usage_guide.pdf
    in 
    $DESIGNWARE_HOME/vip/svt/vip_smartsearch/<version>
    for installation steps.

  • Customer Support

    For more details about VIP smartsearch tool, contact support_center@synopsys.com.
    Mention your queries along with below details and send email to above email id.
    Product: Verification IP
    Sub Product: <vip_title>
    Tool: VIP Smartsearch
13 August 2024, Copyright © 2024 Synopsys, Inc.

svt_dti_transaction Class Reference

Inheritance diagram for class svt_dti_transaction:

List of all members.

Detailed Description

This is the base transaction type which contains all the physical attributes of the transaction like address, data, burst type, burst length, etc. It also provides the timing information of the transaction to the master & slave transactors, that is, delays for valid and ready signals with respect to some reference events.

The svt_dti_transaction also contains a handle to configuration object of type svt_dti_port_configuration , which provides the configuration of the port on which this transaction would be applied. The port configuration is used during randomizing the transaction.


Class Member Groupings

DTI Page request message group attributes  This group contains attributes which are relevant to DTI Page request message group.
DTI Register access message group attributes  This group contains attributes which are relevant to DTI Register access message group.
DTI Invalidation and Synchronization message group attributes  This group contains attributes which are relevant to DTI Invalidation and Synchronization message group.
DTI Translation request message group attributes  This group contains attributes which are relevant to DTI Translation request message group.
DTI Connection and disconnection message group attributes  This group contains attributes which are relevant to DTI Connection and Disconnection message group.
DTI miscellaneous attributes  This group contains attributes which are relevant to DTI vip.
DTI protocol attributes  This group contains attributes which are relevant to DTI protocol.

Public Attributes

rand bit [SVT_DTI_MAX_ADDR_WIDTH-1:0]  addr = 0; 
rand bit [SVT_DTI_ALLOW_PERM_WIDTH-1:0]  allow_permissions = 0; 
rand bit [2:0]   allow_permissions_ats 
rand bit [15:0]   asid 
rand svt_dti_transaction :: ats_fault_type_enum  ats_fault_type 
rand bit [5:0]   ats_inv_range_va_ia = 0; 
rand bit [2:0]   ats_memory_type = 3'b000; 
rand bit  ats_sync_error = 0; 
rand bit  ats_translated 
rand bit [SVT_DTI_BP_TYPE_WIDTH-1:0]  bp_type = 0; 
string  bus_activity_type_name 
string  bus_parent_uid = ""; 
rand bit  bypass = 0; 
svt_dti_transaction :: dti_channel_type_enum  channel_type 
rand bit  combined_allocate = 0; 
rand bit  combined_memory_type = 0; 
rand bit  combined_shareability = 0; 
rand bit  condis_ack_imp_def = 0; 
rand bit  condis_req_imp_def = 0; 
rand bit  connected_state 
rand bit [3:0]   contiguous_streamid = 0; 
rand bit [3:0]   ctxtattr = 0; 
rand bit  cxl = 0; 
rand bit  cxl_io = 0; 
rand bit [7:0]   data [] 
rand bit  destructive_read_permitted = 0; 
rand bit  directed_cache_prefetch = 0; 
rand bit  do_not_cache = 0; 
rand svt_dti_transaction :: fault_type_enum  fault_type 
rand svt_dti_transaction :: trl_flow_enum  flow 
rand bit  global_valid = 1; 
rand bit [3:0]   hw_attr = 0; 
rand bit [SVT_DTI_MAX_ID_WIDTH-1:0]  id = 0; 
rand bit  ident = 0; 
rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  imp_def_type1_mstr_req_imp_def_fields = 'hF28; 
rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  imp_def_type1_mstr_rsp_imp_def_fields = 'h84321; 
rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  imp_def_type1_slv_req_imp_def_fields = 'hF38; 
rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  imp_def_type1_slv_rsp_imp_def_fields = 'h123428; 
rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  imp_def_type2_mstr_req_imp_def_fields = 0; 
rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  imp_def_type2_mstr_rsp_imp_def_fields = 'hAAAAAAA; 
rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  imp_def_type2_slv_req_imp_def_fields = 0; 
rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  imp_def_type2_slv_rsp_imp_def_fields = 'h123428; 
rand bit  inc_aset1 = 0; 
rand bit  instruction_access 
rand svt_dti_transaction :: invalidation_address_range_enum  invalidation_address_range 
rand bit [4:0]   invalidation_size = 0; 
rand bit  inv_comp_error = 0; 
rand bit [4:0]   inv_tag = 0; 
rand bit  last 
rand bit [15:0]   mecid = 0; 
rand svt_dti_transaction :: dti_message_type_enum  message_type 
rand bit  mmuv = 0; 
rand bit  mpamns = 0; 
rand bit  mpamnse = 0; 
rand bit [3:0]   msg_type = 0; 
rand bit  no_trans 
rand bit  non_secure_access 
rand bit  non_secure_extension = 0; 
rand bit [4:0]   num = 0; 
int  object_id = -1; 
rand bit [SVT_DTI_INV_OPERATION_WIDTH-1:0]  operation = 0; 
rand svt_dti_transaction :: output_address_size_enum  output_address_size 
rand bit [3:0]   override_access = 0; 
rand bit [3:0]   override_allocation = 0; 
rand bit [15:0]   override_attributes = 0; 
rand svt_dti_transaction :: override_InD_enum  override_InD 
rand bit  override_non_secure_access = 0; 
rand svt_dti_transaction :: override_PnU_enum  override_PnU 
string  pa_channel_name = ""; 
string  pa_object_type = ""; 
rand bit  page_execute_access 
rand bit  page_priv_access 
rand bit  page_read_access 
rand svt_dti_transaction :: page_response_type_enum  page_resp 
rand bit  page_write_access 
rand bit [SVT_DTI_PARTID_WIDTH-1:0]  part_id = 0; 
rand svt_dti_transaction :: permission_required_enum  perm_req 
rand bit  pmg = 0; 
svt_dti_port_configuration  port_cfg 
int  port_id = -1; 
rand bit [8:0]   prg_index 
rand bit  privileged_access 
rand bit  protocol 
rand bit [SVT_DTI_VERSION_WIDTH-1:0]  protocol_version 
rand bit [3:0]   qos 
rand svt_dti_transaction :: read_write_access_enum  read_write_access 
rand bit  reqex = 0; 
rand bit  same_power_domain = 0; 
int  sbz = 0; 
rand bit [5:0]   scale = 0; 
rand bit [1:0]   secure_stream_id 
rand svt_dti_transaction :: shareability_enum  shareability 
rand bit  shareability_set = 0; 
rand bit [4:0]   sid_vmid_range = 0; 
rand svt_dti_transaction :: exception_level_enum  smmu_stream_world 
rand bit  speculative_translation 
rand bit [3:0]   stage1_hw_attr = 0; 
rand bit [3:0]   stage2_hw_attr = 0; 
rand bit [1:0]   stages = 2'b00; 
rand bit [SVT_DTI_MAX_STREAMID_WIDTH-1:0]  stream_id 
rand bit [SVT_DTI_MAX_SUBSTREAMID_WIDTH-1:0]  substream_id 
rand bit  support_ats_pri_msgs 
rand bit  support_register_access 
rand bit  sup_t = 0; 
rand bit  tbi = 0; 
rand bit  te_oa = 0; 
rand bit [3:0]   token_invalidation 
rand bit [SVT_DTI_MAX_TRL_TOKEN_WIDTH-1:0]  token_translation 
rand bit [SVT_DTI_MAX_ADDR_WIDTH-1:0]  translated_addr 
rand bit [SVT_DTI_TRANS_RNG_WIDTH-1:0]  translation_address_range = 2; 
rand bit [1:0]   translation_granule_size = 2'b00; 
rand bit [1:0]   translation_table_level = 0; 
svt_axi_master_transaction  transport_axi_xact 
rand bit [3:0]   trans_req_imp_def = 0; 
rand bit [3:0]   trans_resp_imp_def = 0; 
rand bit [7:0]   translation_attributes 
rand bit  trusted_entity = 0; 
rand bit  untranslated 
rand bit  valid_substream 
rand bit [51:0]   va_ipa = 0; 
rand bit [15:0]   vmid 
rand bit  write_access 
svt_dti_transaction :: xact_status_enum_type  xact_status 

Member Typedefs

 typedef enum  ats_fault_type_enum 
 typedef enum  dti_channel_type_enum 
 typedef enum  dti_message_type_enum 
 typedef enum  exception_level_enum 
 typedef enum  fault_type_enum 
 typedef enum  invalidation_address_range_enum 
 typedef enum  output_address_size_enum 
 typedef enum  override_InD_enum 
 typedef enum  override_PnU_enum 
 typedef enum  page_response_type_enum 
 typedef enum  permission_required_enum 
 typedef enum  read_write_access_enum 
 typedef enum  secure_stream_id_status_enum_type 
 typedef enum  shareability_enum 
 typedef enum  state_enum_type 
 typedef enum  trl_flow_enum 
 typedef enum  xact_nse_ns_status_enum_type 
 typedef enum  xact_status_enum_type 

Class Member Groupings


Group: DTI Page request message group attributes

This group contains attributes which are relevant to DTI Page request message group.

rand bit  last 
rand bit  page_execute_access 
rand bit  page_priv_access 
rand bit  page_read_access 
rand svt_dti_transaction :: page_response_type_enum  page_resp 
rand bit  page_write_access 
rand bit [8:0]   prg_index 

Group: DTI Register access message group attributes

This group contains attributes which are relevant to DTI Register access message group.

rand bit [7:0]   data [] 

Group: DTI Invalidation and Synchronization message group attributes

This group contains attributes which are relevant to DTI Invalidation and Synchronization message group.

rand bit [5:0]   ats_inv_range_va_ia = 0; 
rand bit  ats_sync_error = 0; 
rand bit  inc_aset1 = 0; 
rand bit [4:0]   invalidation_size = 0; 
rand bit [4:0]   num = 0; 
rand bit [SVT_DTI_INV_OPERATION_WIDTH-1:0]  operation = 0; 
rand bit [5:0]   scale = 0; 
rand bit [4:0]   sid_vmid_range = 0; 
rand bit [1:0]   translation_granule_size = 2'b00; 
rand bit [1:0]   translation_table_level = 0; 

Group: DTI Translation request message group attributes

This group contains attributes which are relevant to DTI Translation request message group.

rand svt_dti_transaction :: ats_fault_type_enum  ats_fault_type 
rand bit [2:0]   ats_memory_type = 3'b000; 
rand bit  ats_translated 
rand bit  combined_allocate = 0; 
rand bit  combined_memory_type = 0; 
rand bit  combined_shareability = 0; 
rand bit [3:0]   ctxtattr = 0; 
rand bit  cxl_io = 0; 
rand svt_dti_transaction :: fault_type_enum  fault_type 
rand svt_dti_transaction :: trl_flow_enum  flow 
rand bit [3:0]   hw_attr = 0; 
rand bit  instruction_access 
rand bit  mpamns = 0; 
rand bit  non_secure_access 
rand bit [SVT_DTI_PARTID_WIDTH-1:0]  part_id = 0; 
rand svt_dti_transaction :: permission_required_enum  perm_req 
rand bit  pmg = 0; 
rand bit  privileged_access 
rand bit [3:0]   qos 
rand svt_dti_transaction :: read_write_access_enum  read_write_access 
rand bit [1:0]   secure_stream_id 
rand svt_dti_transaction :: shareability_enum  shareability 
rand bit  speculative_translation 
rand bit [3:0]   stage1_hw_attr = 0; 
rand bit [3:0]   stage2_hw_attr = 0; 
rand bit [3:0]   trans_req_imp_def = 0; 
rand bit [3:0]   trans_resp_imp_def = 0; 
rand bit [7:0]   translation_attributes 
rand bit  write_access 

Group: DTI Connection and disconnection message group attributes

This group contains attributes which are relevant to DTI Connection and Disconnection message group.

rand bit  condis_ack_imp_def = 0; 
rand bit  condis_req_imp_def = 0; 
rand bit  connected_state 
rand bit  no_trans 
rand svt_dti_transaction :: output_address_size_enum  output_address_size 
rand bit [SVT_DTI_VERSION_WIDTH-1:0]  protocol_version 
rand bit  support_ats_pri_msgs 
rand bit  support_register_access 
rand bit [3:0]   token_invalidation 
rand bit [SVT_DTI_MAX_TRL_TOKEN_WIDTH-1:0]  token_translation 

Group: DTI miscellaneous attributes

This group contains attributes which are relevant to DTI vip.

int  object_id = -1; 
string  pa_object_type = ""; 
svt_dti_port_configuration  port_cfg 
svt_axi_master_transaction  transport_axi_xact 
svt_dti_transaction :: xact_status_enum_type  xact_status 

Group: DTI protocol attributes

This group contains attributes which are relevant to DTI protocol.

rand bit [SVT_DTI_MAX_ADDR_WIDTH-1:0]  addr = 0; 
rand bit  cxl = 0; 
rand bit [SVT_DTI_MAX_ID_WIDTH-1:0]  id = 0; 
rand bit  ident = 0; 
rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  imp_def_type1_mstr_req_imp_def_fields = 'hF28; 
rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  imp_def_type1_slv_req_imp_def_fields = 'hF38; 
rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  imp_def_type2_mstr_req_imp_def_fields = 0; 
rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  imp_def_type2_slv_req_imp_def_fields = 0; 
rand bit  inv_comp_error = 0; 
rand bit [4:0]   inv_tag = 0; 
rand bit [15:0]   mecid = 0; 
rand svt_dti_transaction :: dti_message_type_enum  message_type 
rand bit  mmuv = 0; 
rand bit  mpamnse = 0; 
rand bit  non_secure_extension = 0; 
rand bit  protocol 
rand bit  reqex = 0; 
rand bit  same_power_domain = 0; 
rand bit [1:0]   stages = 2'b00; 
rand bit [SVT_DTI_MAX_STREAMID_WIDTH-1:0]  stream_id 
rand bit [SVT_DTI_MAX_SUBSTREAMID_WIDTH-1:0]  substream_id 
rand bit  sup_t = 0; 
rand bit  te_oa = 0; 
rand bit  trusted_entity = 0; 
rand bit  valid_substream 

Member Attribute Documentation

 rand bit [SVT_DTI_MAX_ADDR_WIDTH-1:0]  attribute
 svt_dti_transaction::addr = 0

Width of this signal is controlled through macro SVT_DTI_MAX_ADDR_WIDTH. Default value of this macro is 64. To change the width of this variable value of this macro needs to be changed. Define the new value for the macro in file svt_dti_user_defines.svi, and then specify this file to be compiled by the simulator. Also, specify +define+SVT_DTI_INCLUDE_USER_DEFINES on the simulator compilation command line. Please consult User Guide for additional information, and consult VIP example for usage demonstration. The SVT_DTI_MAX_ADDR_WIDTH macro is only used to control the maximum width of the signal. The actual width used by VIP is controlled by configuration parameter svt_dti_port_configuration :: addr_width.

This represents address information field of different messages. For example, 'addr' implies Input Address IA field of DTI_TBU_TRANS_REQ message 'addr' implies Output Address OA field of DTI_TBU_TRANS_RSP message

 rand bit [SVT_DTI_ALLOW_PERM_WIDTH-1:0]  attribute
 svt_dti_transaction::allow_permissions = 0

 rand bit [2:0]   attribute
 svt_dti_transaction::allow_permissions_ats

 rand bit [15:0]   attribute
 svt_dti_transaction::asid

 rand svt_dti_transaction :: ats_fault_type_enum  attribute
 svt_dti_transaction::ats_fault_type

It represents FAULT_TYPE field of DTI_ATS_TRANS_FAULT message.
This bit indicates to the TBU how to handle the fault.
00: InvalidTranslation.
01: CompleterAbort.
10: UnsupportedRequest.
11: Reserved.

Applicable for ATS protocol.

 rand bit [5:0]   attribute
 svt_dti_transaction::ats_inv_range_va_ia = 0

It represents RANGE field of DTI_ATS_INV_REQ message.
This field indicates the range of Virtual Addresses for invalidation. Applicable for ATS protocol.

 rand bit [2:0]   attribute
 svt_dti_transaction::ats_memory_type = 3'b000

It represents AMA field of DTI_ATS_TRANS_RESP message.
ats_memory_attribute (AMA).Applicable for DTI-ATSv2.
This field indicates the translation attributes in a form that is designed for use by the PCIe ATS Memory Attributes field.
For details,Refer ARM-IHI0088 version E and E.b

Applicable for ATS protocol.
Applicable from Spec version E onwards.
Applicable for DTI-ATSv2. It is RSVD,SBZ for DTI-ATSv1

 rand bit  attribute
 svt_dti_transaction::ats_sync_error = 0

It represents ERROR field of DTI_ATS_SYNC_ACK message.
This bit indicates that a PCIe error has occurred.

Applicable for ATS protocol.

 rand bit  attribute
 svt_dti_transaction::ats_translated

It represents ATST field in DTI_TBU_TRANS_REQ.
This bit indicates whether the transaction is ATS-translated.
When '1' this bit indicates that this transaction was the result of a previous ATS translation request made using DTI-ATS.
Applicable for TBU protocol.(applicable for DTI Edition 2 (ARM:100225_0000_02en only)
Available in DTI-TBUv1. Later specification version E (DTI-TBUv2) onwards ATST has been part of new FLOW[1:0] field.
FLOW[1:0] =2'b01 reflects ATST encoding.

 rand bit [SVT_DTI_BP_TYPE_WIDTH-1:0]  attribute
 svt_dti_transaction::bp_type = 0

 string  attribute
 svt_dti_transaction::bus_activity_type_name

 string  attribute
 svt_dti_transaction::bus_parent_uid = ""

 rand bit  attribute
 svt_dti_transaction::bypass = 0

 svt_dti_transaction :: dti_channel_type_enum  attribute
 svt_dti_transaction::channel_type = DTI_TX

 rand bit  attribute
 svt_dti_transaction::combined_allocate = 0

It represents COMB_ALLOC field of DTI_TBU_TRANS_RESP message.
combined_allocate(COMB_ALLOC). For version DTI_TBUv2, this field indicates how translation allocation hint to be handled.
It represents allocation hint.
For DTI_TBUv1 - it is Reserved.
0: The allocation hints in the ATTR field override the transaction attributes.
1: The allocation hints in the ATTR field are combined with the transaction attributes.

Applicable for TBU protocol.
Applicable from Spec version E onwards. Applicable for DTI-TBUv2. It is RSVD,SBZ for DTI-TBUv1

 rand bit  attribute
 svt_dti_transaction::combined_memory_type = 0

It represents COMB field of DTI_TBU_TRANS_RESP message.
It represents combined_memory_type.For version DTI_TBUv2, this field indicates how translation memory type and cacheability to be handled.

For DTI_TBUv1 - it is Reserved. 0: the memory type and cacheability in the ATTR field override the transaction attribute.
1: the memory type and cacheability in the ATTR field to be combined with the transaction attribute.

Applicable for TBU protocol. Applicable from Spec version E onwards. Applicable for DTI-TBUv2. It is RSVD,SBZ for DTI-TBUv1

 rand bit  attribute
 svt_dti_transaction::combined_shareability = 0

It represents COMB_SH field of DTI_TBU_TRANS_RESP message.
combined_shareability(COMB_SH) For version DTI_TBUv2, this field indicates how translation shareability to be handled.
It represents combined_shareability.
For DTI_TBUv1 - it is Reserved.
0: the shareability in the SH field override the transaction attributes.
1: the shareability in the SH field to be combined with the transaction attributes.

Applicable for TBU protocol.
Applicable from Spec version E onwards. Applicable for DTI-TBUv2. It is RSVD,SBZ for DTI-TBUv1

 rand bit  attribute
 svt_dti_transaction::condis_ack_imp_def = 0

It represents implementation defined field of DTI_TBU_CONDIS_ACK messages. condis_ack_imp_def is at bit 7 of DTI_TBU_CONDIS_ACK.
Applicable for TBU and ATS protocol.

 rand bit  attribute
 svt_dti_transaction::condis_req_imp_def = 0

It represents implementation defined field of DTI_TBU_CONDIS_REQ messages. condis_req_imp_def is at bit 7 of DTI_TBU_CONDIS_REQ.
Applicable for TBU and ATS protocol.

 rand bit  attribute
 svt_dti_transaction::connected_state

It represents STATE field of DTI messages. This bit identifies the new channel state requested.
Applicable for TBU and ATS protocol.

 rand bit [3:0]   attribute
 svt_dti_transaction::contiguous_streamid = 0

 rand bit [3:0]   attribute
 svt_dti_transaction::ctxtattr = 0

It represents CTXTATTR field of DTI_TBU_TRANS_RESP message.
This field gives IMPLEMENTATION DEFINED attributes for the translation context.

Applicable for TBU protocol.
This field is applicable when protocol version is DTI-TBUv1 Refer specification for details.

 rand bit  attribute
 svt_dti_transaction::cxl = 0

cxl(CXL) reflects the value set in the 'source_cxl' bit of the ATS request. Applicable for DTI-ATSv3. This field is the member of DTI_ATS_TRANS_RESP message.

 rand bit  attribute
 svt_dti_transaction::cxl_io = 0

It represents CXL_IO field of DTI_TBU_TRANS_RESP/DTI_ATS_TRANS_RESP message.
cxl_io (CXL_IO).
Used by the root ports implementing CXL.
0 - The translation response can be used be by CXL.io or CXL.cache
1 - The translation response can only be used for cxl.io translated transactions.

Applicable for TBU and ATS protocol.
Applicable from Spec version E onwards.
Applicable for DTI-TBUv2/DTI-ATSv2. It is RSVD,SBZ for DTI-TBUv1/DTI-ATSv1

 rand bit [7:0]   attribute
 svt_dti_transaction::data[]

This represents the data in dti transaction. This is an 8 bit wide array which is used by the Register access message group. In DTI_TBU_REG_WRITE message, [7:0]data[3] represents the data to be written by the TCU. In DTI_TBU_REG_RDATA message, [7:0]data[3] represents the data read from the TBU. Upon receiving the response DTI_TBU_REG_RDATA message, the read request transaction DTI_TBU_REG_READ is updated with the read data.

Applicable for TBU protocol.

 rand bit  attribute
 svt_dti_transaction::destructive_read_permitted = 0

 rand bit  attribute
 svt_dti_transaction::directed_cache_prefetch = 0

 rand bit  attribute
 svt_dti_transaction::do_not_cache = 0

 rand svt_dti_transaction :: fault_type_enum  attribute
 svt_dti_transaction::fault_type

It represents FAULT_TYPE field of DTI_TBU_TRANS_FAULT message.
This bit indicates to the TBU how to handle the fault.

For spec 2.0 and 3.0 , The FAULT_TYPE is of 2 bits.
00: NonAbort.
01: Abort.
10: StreamDisabled.
11: GlobalDisabled.

From Spec E and above this FAULT_TYPE is of 3 bits.
000: NonAbort.
001: Abort.
010: StreamDisabled.
011: GlobalDisabled.
100: TranslationPRI.
101: TranslatoinStall.
For details,Refer ARM-IHI0088 version E and E.b

Applicable for TBU protocol.

 rand svt_dti_transaction :: trl_flow_enum  attribute
 svt_dti_transaction::flow

It represents FLOW[1:0] field in DTI_TBU_TRANS_REQ.
It represents translation flow required.
This field provides the information with a transaction about the flow and TCU a hint to respond and handle the faults.
If the flow value is :
STALL : Indicates the translation request supports the stall fault flow. TCU may stall response.
ATST : Indicates this transaction is a result of periviously translated request made by ATS.
NOSTALL : Indicates the translation request doesn't support the stall fault flow. fault response must be returned.
PRI : Indicates that this transaction if results in tranlsation fault will resolve issue using PRI request(PCIe End point uses this option) via DTI-ATS connection.

Applicable for TBU protocol.
Applicable from specification version E (ARM: IHI0088E-ID082620) onwards.

 rand bit  attribute
 svt_dti_transaction::global_valid = 1

 rand bit [3:0]   attribute
 svt_dti_transaction::hw_attr = 0

It represents HWATTR field of DTI_TBU_TRANS_RESP message.
hw_attr(HWATTR) For version DTI_TBUv2, this field indicates how translation memory type and cacheability to be handled.
It represents combined_memory_type.
For DTI_TBUv1 - it is Reserved.
0: the memory type and cacheability in the ATTR field override the transaction attribute.
1: the memory type and cacheability in the ATTR field to be combined with the transaction attribute.

Applicable for TBU protocol.
Applicable from Spec version E onwards. Applicable for DTI-TBUv2. It is RSVD,SBZ for DTI-TBUv1

 rand bit [SVT_DTI_MAX_ID_WIDTH-1:0]  attribute
 svt_dti_transaction::id = 0

Width of this signal is controlled through macro SVT_DTI_MAX_ID_WIDTH. Default value of this macro is 8. To change the maximum width of this variable, user can change the value of this macro. Define the new value for the macro in file svt_dti_user_defines.svi, and then specify this file to be compiled by the simulator. Also, specify +define+SVT_DTI_INCLUDE_USER_DEFINES on the simulator compilation command line. Please consult User Guide for additional information, and consult VIP example for usage demonstration. The SVT_DTI_MAX_ID_WIDTH macro is only used to control the maximum width of the signal. The actual width used by VIP is controlled by configuration parameter svt_dti_port_configuration :: id_width.

 rand bit  attribute
 svt_dti_transaction::ident = 0

identity_translation (IDENT) indicates whether an identity translation is required. When identity translation is needed, IDENT is set to '1' and FLOW must be ATST. When MMUV = '0' IDENT is reserved. Applicable for DTI-TBUv3. This field is the member of DTI_TBU_TRANS_REQ message.

 rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  attribute
 svt_dti_transaction::imp_def_type1_mstr_req_imp_def_fields = 'hF28

It represents implementation defined field of DTI_TBU_MASTER_IMP_DEF_TYPE1_REQ messages. imp_def_type1_mstr_req_imp_def_fields is at bit 3 to 160 of DTI_TBU_MASTER_IMP_DEF_TYPE1_REQ

 rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  attribute
 svt_dti_transaction::imp_def_type1_mstr_rsp_imp_def_fields = 'h84321

 rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  attribute
 svt_dti_transaction::imp_def_type1_slv_req_imp_def_fields = 'hF38

It represents implementation defined field of DTI_TBU_SLAVE_IMP_DEF_TYPE1_REQ messages. imp_def_type1_slv_req_imp_def_fields is at bit 3 to 160 of DTI_TBU_SLAVE_IMP_DEF_TYPE1_REQ

 rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE1_MSG_MAX_WIDTH-1)-4:0]  attribute
 svt_dti_transaction::imp_def_type1_slv_rsp_imp_def_fields = 'h123428

 rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  attribute
 svt_dti_transaction::imp_def_type2_mstr_req_imp_def_fields = 0

It represents implementation defined field of DTI_TBU_MASTER_IMP_DEF_TYPE2_REQ messages. imp_def_type2_mstr_req_imp_def_fields is at bit 3 to `SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_MSG_MAX_WIDTH_1 of DTI_TBU_MASTER_IMP_DEF_TYPE2_REQ

 rand bit [(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  attribute
 svt_dti_transaction::imp_def_type2_mstr_rsp_imp_def_fields = 'hAAAAAAA

 rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  attribute
 svt_dti_transaction::imp_def_type2_slv_req_imp_def_fields = 0

It represents implementation defined field of DTI_TBU_MASTER_IMP_DEF_TYPE2_REQ messages. imp_def_type2_mstr_req_imp_def_fields is at bit 3 to `SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_MSG_MAX_WIDTH_1 of DTI_TBU_MASTER_IMP_DEF_TYPE2_REQ

 rand bit [(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE2_MSG_MAX_WIDTH-1)-4:0]  attribute
 svt_dti_transaction::imp_def_type2_slv_rsp_imp_def_fields = 'h123428

 rand bit  attribute
 svt_dti_transaction::inc_aset1 = 0

It represents INC_ASET1 field of DTI_TBU_INV_REQ message.
This bit indicates whether the ASET value of a translation affects its invalidation.

Applicable for TBU protocol.

 rand bit  attribute
 svt_dti_transaction::instruction_access

It represents InD field in DTI_TBU_TRANS_REQ/DTI_ATS_TRANS_REQ.
This bit indicates whether the transaction is an instruction access or data access in DTI_TBU_TRANS_REQ.
When '0' : Data access.
When '1' : Instruction access.
This bit indicates whether execute (instruction) access is requested in DTI_ATS_TRANS_REQ.
When '0' : The translation will only be used for data accesses.
When '1' : The translation might be used for instruction and data accesses.

Applicable for TBU and ATS protocol.

 rand svt_dti_transaction :: invalidation_address_range_enum  attribute
 svt_dti_transaction::invalidation_address_range

 rand bit [4:0]   attribute
 svt_dti_transaction::invalidation_size = 0

It represents SIZE field of DTI_TBU_INV_REQ message.
This field relates to invalidate operation. SIZE is when OPERATION is a TLB Invalidate operation.
The SIZE field is DTI_TBU_INV_REQ[15:12]. It overlaps with TG, TTL and SSID[3:0]. Refer to specifcation for details.

Applicable for TBU protocol. Applicable from Spec version F onwards.

 rand bit  attribute
 svt_dti_transaction::inv_comp_error = 0

inv_comp_error(ERROR) indicates the Invalidation completion error. Applicable for DTI-ATSv3. This field is the member of DTI_ATS_INV_COMP message.

 rand bit [4:0]   attribute
 svt_dti_transaction::inv_tag = 0

inv_tag(ITAG) indicates the Invalidation tag. Applicable for DTI-ATSv3. This field is the member of DTI_ATS_INV_REQ and DTI_ATS_INV_COMP message.

 rand bit  attribute
 svt_dti_transaction::last

It represents Last field in DTI_ATS_PAGE_REQ message. This field indicates last request message in a page request group.

Applicable for ATS protocol.

 rand bit [15:0]   attribute
 svt_dti_transaction::mecid = 0

Memory_encryption_context (MECID) indicates memory extension context information for RME-DA. This is feature belongs to RME-DA(Relam management Extension -Device assignment). Applicable for DTI-TBUv3. This field is the member of DTI_TBU_TRANS_RESPEX message.

 rand svt_dti_transaction :: dti_message_type_enum  attribute
 svt_dti_transaction::message_type

It represents message type field msg_type of every DTI messages.

 rand bit  attribute
 svt_dti_transaction::mmuv = 0

MMUV. Applicable for DTI-TBUv3. This field is the member of DTI_TBU_TRANS_REQ message.

 rand bit  attribute
 svt_dti_transaction::mpamns = 0

It represents MPAMNS field of DTI_TBU_TRANS_RESP message.
MPAMNS For version DTI_TBUv2, this field indicates information related to Memory partioning and monitoring(MPAM) security indicator.
For DTI_TBUv1 - It is Reserved.
For DTI_TBUv2 - It represent the MPAM NS value.

Applicable for TBU protocol.
Applicable from Spec version E onwards. Applicable for DTI-TBUv2. It is RSVD,SBZ for DTI-TBUv1

 rand bit  attribute
 svt_dti_transaction::mpamnse = 0

mpamnse (MPAMNSE) indicates extension of the security states for MPAM. This is feature belongs to RME-DA(Relam management Extension -Device assignment). Applicable for DTI-TBUv3. This field is the member of DTI_TBU_TRANS_REQ message. {MPAMNSE,MPAMNS} indicates PARTID set and security state of MPAM:

 rand bit [3:0]   attribute
 svt_dti_transaction::msg_type = 0

 rand bit  attribute
 svt_dti_transaction::no_trans

It represents NO_TRANS field of DTI_ATS_CONDIS_REQ message. This field indicates no messages for translation group, invalidation and sync group.
when set '1' no DTI_ATS_TRANS_* messages will be permitted.
no DTI_ATS_INV_* messages will be permitted.
no DTI_ATS_SYNC_* messages will be permitted.
Applicable for only TBU protocol.

 rand bit  attribute
 svt_dti_transaction::non_secure_access

It represents NS field in DTI_TBU_TRANS_REQ/DTI_TBU_TRANS_RESP.
This bit indicates the security level of the transaction when in DTI_TBU_TRANS_REQ.
This bit indicates the security status to be used for downstream transactions when in DTI_TBU_TRANS_RESP.
Applicable for TBU protocol.

 rand bit  attribute
 svt_dti_transaction::non_secure_extension = 0

non_secure_extension (NSE) indicates extension of the security states. This is feature belongs to RME-DA(Relam management Extension -Device assignment). Applicable for DTI-TBUv3. This field is the member of DTI_TBU_TRANS_REQ/RESP, DTI_TBU_REG_WRITE/READ message. {NSE,NS} provides security state encodings: 00 - Secure. 01 - Non-Secure. 10 - Root. 11 - Realm.

 rand bit [4:0]   attribute
 svt_dti_transaction::num = 0

It represents NUM field of DTI_TBU_INV_REQ message.
This field relates to range invalidate operation. NUM is when OPERATION is a TLB Invalidate operation.
Refer to specifcation for details.

Applicable for TBU protocol. Applicable from Spec version E onwards.

 int  attribute
 svt_dti_transaction::object_id = -1

Variable that holds the object_id of this transaction

 rand bit [SVT_DTI_INV_OPERATION_WIDTH-1:0]  attribute
 svt_dti_transaction::operation = 0

It represents OPERATION field of DTI_TBU_INV_REQ/DTI_ATS_INV_REQ message.
This field identifies the type of invalidation operation being performed.

Applicable for TBU and ATS protocol.

 rand svt_dti_transaction :: output_address_size_enum  attribute
 svt_dti_transaction::output_address_size

It represents OAS field of DTI_TBU_CONDIS_ACK/DTI_ATS_CONDIS_ACK It represents the output address size which is the maximum address size permitted for translated addresses.
Applicable for TBU and ATS protocol.
Reserved for DTI-ATSv2,DTI_ATSv3

 rand bit [3:0]   attribute
 svt_dti_transaction::override_access = 0

 rand bit [3:0]   attribute
 svt_dti_transaction::override_allocation = 0

 rand bit [15:0]   attribute
 svt_dti_transaction::override_attributes = 0

 rand svt_dti_transaction :: override_InD_enum  attribute
 svt_dti_transaction::override_InD = USE_INCOMING

 rand bit  attribute
 svt_dti_transaction::override_non_secure_access = 0

 rand svt_dti_transaction :: override_PnU_enum  attribute
 svt_dti_transaction::override_PnU = USE_INCOMING_PNU

 string  attribute
 svt_dti_transaction::pa_channel_name = ""

 string  attribute
 svt_dti_transaction::pa_object_type = ""

Variables used in generating XML/FSDB for pa writer

 rand bit  attribute
 svt_dti_transaction::page_execute_access

It represents INST (execute access) field in DTI_ATS_PAGE_REQ message. This field indicates whether execute access is requested or not.

Applicable for ATS protocol.

 rand bit  attribute
 svt_dti_transaction::page_priv_access

It represents PRIV (privileged access) field in DTI_ATS_PAGE_REQ message. This field indicates whether privileged access is requested or not.

Applicable for ATS protocol.

 rand bit  attribute
 svt_dti_transaction::page_read_access

It represents READ (read access) field in DTI_ATS_PAGE_REQ message. This field indicates whether read access is requested or not.

Applicable for ATS protocol.

 rand svt_dti_transaction :: page_response_type_enum  attribute
 svt_dti_transaction::page_resp

It represents resp field in DTI_ATS_PAGE_RESP message. This field indicates response type for the page requested.
If the page response code to the page request is :
RESPONSE_FAILURE : Indicates permanent error has happened.
INVALID_REQUEST : Indicates the page-in was not successful for atleast one of the page group.
SUCCESS : Indicates the page-in was successful for all the pages.
RSVD : Reserved

Applicable for ATS protocol.

 rand bit  attribute
 svt_dti_transaction::page_write_access

It represents WRITE (write access) field in DTI_ATS_PAGE_REQ message. This field indicates whether write access is requested or not.

Applicable for ATS protocol.

 rand bit [SVT_DTI_PARTID_WIDTH-1:0]  attribute
 svt_dti_transaction::part_id = 0

It represents PARTID field of DTI_TBU_TRANS_RESP message.
part_id(PARTID)

Applicable for TBU protocol.
Applicable from Spec version E onwards.
Applicable for DTI-TBUv2. It is RSVD,SBZ for DTI-TBUv1

 rand svt_dti_transaction :: permission_required_enum  attribute
 svt_dti_transaction::perm_req

It represents PERM[1:0] field in DTI_TBU_TRANS_REQ.
This bit indicates whether write or read access is requested.
When 2'b00 : W:Write permission required.
When 2'b01 : R:Read permission required.
When 2'b10 : RW: Read and write permission required.
When 2'b11 : SPEC: Neither permission required. The translation request is speculative and cannot cause a permission fault.

Applicable for TBU protocol.
Applicable from specification version DTI Edition 3 (ARM: 100225_0000_03_en) onwards. SPECULATIVE and RnW has been combined to form PERM[1:0] where PERM[1] reflects SPECULATIVE, PERM[0] reflects RnW encoding.

 rand bit  attribute
 svt_dti_transaction::pmg = 0

It represents PMG field of DTI_TBU_TRANS_RESP message.
mpam pmg(PMG)

Applicable for TBU protocol.
Applicable from Spec version E onwards.
Applicable for DTI-TBUv2. It is RSVD,SBZ for DTI-TBUv1

 svt_dti_port_configuration  attribute
 svt_dti_transaction::port_cfg

The port configuration corresponding to this transaction

 int  attribute
 svt_dti_transaction::port_id = -1

 rand bit [8:0]   attribute
 svt_dti_transaction::prg_index

It represents PRG_INDEX field in DTI_ATS_PAGE_REQ and DTI_ATS_PAGE_RESP message. This field indicates Page request group index.

Applicable for ATS protocol.

 rand bit  attribute
 svt_dti_transaction::privileged_access

It represents PnU field in DTI_TBU_TRANS_REQ/DTI_ATS_TRANS_REQ.
This bit indicates whether this transaction represents privileged or unprivileged access.
When '0' : Unprivileged.
When '1' : Privileged.

Applicable for TBU and ATS protocol.

 rand bit  attribute
 svt_dti_transaction::protocol

It represents PROTOCOL field of DTI_TBU_CONDIS_REQ/DTI_ATS_CONDIS_REQ/DTI_TBU_TRANS_REQ/DTI_ATS_TRANS_REQ/DTI_ATS_PAGE_REQ messages.
This bit identifies the protocol that is used by this DTI master.
value '0' represents TBU.
value '1' represents ATS.
Applicable for TBU and ATS protocol.

 rand bit [SVT_DTI_VERSION_WIDTH-1:0]  attribute
 svt_dti_transaction::protocol_version

It represents VERSION field of DTI messages. This field identifies the requested protocol version. If DTI TBU and TCU supports V2 then ports are set accordingly. Ex. cfg.dti_version = svt_dti_port_configuration :: DTI2_0 and svt_dti_transaction :: protocol_version will have value '1' in the DTI_TBU_CONDIS_REQ/ DTI_ATS_CONDIS_REQ.
For v1 version :
svt_dti_transaction :: protocol_version is set to '0' which represents V1.
Corresponding port_configuration is cfg.dti_version = svt_dti_port_configuration :: DTI1_0 .
For v2 version :
svt_dti_transaction :: protocol_version is set to '1' which represents V2.
Corresponding port_configuration is cfg.dti_version = svt_dti_port_configuration :: DTI2_0 .
For v3 version :
svt_dti_transaction :: protocol_version is set to '2' which represents V3.
Corresponding port_configuration is cfg.dti_version = svt_dti_port_configuration :: DTI3_0 .
For v4 version :
svt_dti_transaction :: protocol_version is set to '3' which represents V3.
Corresponding port_configuration is cfg.dti_version = svt_dti_port_configuration :: DTI4_0 .

Applicable for TBU and ATS protocol.

 rand bit [3:0]   attribute
 svt_dti_transaction::qos

It represents QOS field in DTI_TBU_TRANS_REQ/DTI_ATS_TRANS_REQ.
This field indicates the Quality of Service priority level.

Applicable for TBU and ATS protocol.

 rand svt_dti_transaction :: read_write_access_enum  attribute
 svt_dti_transaction::read_write_access

It represents RnW field in DTI_TBU_TRANS_REQ.
This bit indicates whether write or read access is requested.
When '0' : write access.
When '1' : read access.

Applicable for TBU protocol.(applicable for DTI Edition 2 (ARM:100225_0000_02en only).
Available in DTI-TBUv1. Later specification version 3.0 onwards SPECULATIVE and RnW has been combined to form PERM[1:0] where PERM[1] reflects SPECULATIVE, PERM[0] reflects RnW encoding.

 rand bit  attribute
 svt_dti_transaction::reqex = 0

reqex indicates if translation resp DTI_TBU_TRANS_RESPEX can be given. This is feature belongs to MECID(memory encryption context) for RME-DA(Relam management Extension -Device assignment). Applicable for DTI-TBUv3. This field is the member of DTI_TBU_TRANS_REQ message. when this is 0 - DTI_TBU_TRANS_RESPEX cannot be given 1 - DTI_TBU_TRANS_RESPEX can be given.

 rand bit  attribute
 svt_dti_transaction::same_power_domain = 0

same_power_domain (SPD). Applicable for DTI-TBUv3. This field is the member of DTI_TBU_CONDIS_REQ message and indicates the same power domain of TBU and TCU.

 int  attribute
 svt_dti_transaction::sbz = 0

 rand bit [5:0]   attribute
 svt_dti_transaction::scale = 0

It represents SCALE field of DTI_TBU_INV_REQ message.
This field relates to range invalidate operation. SCALE is when OPERATION is a TLB Invalidate operation.
Refer to specifcation for details.

Applicable for TBU protocol. Applicable from Spec version E onwards.

 rand bit [1:0]   attribute
 svt_dti_transaction::secure_stream_id

It represents SEC_SID field in DTI_TBU_TRANS_REQ.
This bit indicates whether the StreamID is Secure.
When '1' represents Secure StreamID(SID).

Applicable for TBU protocol.
DTI-TBUv1,DTI-TBUv2 has secure and non-secure security state encoding.
DTI-TBUv3 has more security state encoding ex- realm.

 rand svt_dti_transaction :: shareability_enum  attribute
 svt_dti_transaction::shareability = OUTER_SHARABLE

It represents SH field of DTI_TBU_TRANS_RESP message.
This field indicates the shareability of the translation.
When '2'b00': Non-Shareable.
When '2'b01': Reserved.
When '2'b10': Outer-Shareable.
When '2'b11': Inner-Shareable.

Applicable for TBU protocol.

 rand bit  attribute
 svt_dti_transaction::shareability_set = 0

 rand bit [4:0]   attribute
 svt_dti_transaction::sid_vmid_range = 0

It represents RANGE field of DTI_TBU_INV_REQ message.
This field indicates the range of SIDs or VMIDs for invalidation.

Applicable for TBU protocol.

 rand svt_dti_transaction :: exception_level_enum  attribute
 svt_dti_transaction::smmu_stream_world = EXCEPTION_LEVEL_1

 rand bit  attribute
 svt_dti_transaction::speculative_translation

It represents SPECULATIVE field in DTI_TBU_TRANS_REQ.
This bit indicates whether the translation request is speculative.
Applicable for TBU protocol.(applicable for DTI Edition 2 (ARM:100225_0000_02en only)
Available in DTI-TBUv1. Later specification version 3.0 onwards SPECULATIVE and RnW has been combined to form PERM[1:0] where PERM[1] reflects and SPECULATIVE PERM[0] reflects RnW.
SPECULATIVE encoding is when PERM[1:0]=2'b11.

 rand bit [3:0]   attribute
 svt_dti_transaction::stage1_hw_attr = 0

It represents S1HWATTR field of DTI_TBU_TRANS_RESP message.
This field gives the IMPLEMENTATION DEFINED stage 1 hardware attributes.

Applicable for TBU protocol.
For DTI-TBUv2- This bit is reserved.

 rand bit [3:0]   attribute
 svt_dti_transaction::stage2_hw_attr = 0

It represents S2HWATTR field of DTI_TBU_TRANS_RESP message.
This field gives the IMPLEMENTATION DEFINED stage 2 hardware attributes.

Applicable for TBU protocol.
For DTI-TBUv2 - This is not used.

 rand bit [1:0]   attribute
 svt_dti_transaction::stages = 2'b00

stages (STAGES). Applicable for DTI-TBUv3. This field is the member of DTI_TBU_CONDIS_REQ message and indicates the translation stages to support RME and RME-DA .

 rand bit [SVT_DTI_MAX_STREAMID_WIDTH-1:0]  attribute
 svt_dti_transaction::stream_id

It represents SID field in DTI_TBU_TRANS_REQ/DTI_ATS_TRANS_REQ/DTI_TBU_INV_REQ/DTI_ATS_INV_REQ/DTI_ATS_PAGE_REQ/DTI_ATS_PAGE_RESP.
It is StreamID that is used for translation or invalidation. Width of this signal is controlled through macro SVT_DTI_MAX_STREAMID_WIDTH. Default value of this macro is 32. To change the maximum width of this variable, user can change the value of this macro. Define the new value for the macro in file svt_dti_user_defines.svi, and then specify this file to be compiled by the simulator. Also, specify +define+SVT_DTI_INCLUDE_USER_DEFINES on the simulator compilation command line. Please consult User Guide for additional information, and consult VIP example for usage demonstration. The SVT_DTI_MAX_STREAMID_WIDTH macro is only used to control the maximum width of the signal. The actual width used by VIP is controlled by configuration parameter svt_dti_port_configuration :: streamid_width.
Applicable for TBU and ATS protocol.

 rand bit [SVT_DTI_MAX_SUBSTREAMID_WIDTH-1:0]  attribute
 svt_dti_transaction::substream_id

It represents SSID field in DTI_TBU_TRANS_REQ/DTI_ATS_TRANS_REQ/DTI_TBU_INV_REQ/DTI_ATS_INV_REQ/DTI_ATS_PAGE_REQ/DTI_ATS_PAGE_RESP.
It is SubstreamID that is used for translation or invalidation. Width of this signal is controlled through macro SVT_DTI_MAX_SUBSTREAMID_WIDTH. Default value of this macro is 20. To change the maximum width of this variable, user can change the value of this macro. Define the new value for the macro in file svt_dti_user_defines.svi, and then specify this file to be compiled by the simulator. Also, specify +define+SVT_DTI_INCLUDE_USER_DEFINES on the simulator compilation command line. Please consult User Guide for additional information, and consult VIP example for usage demonstration. The SVT_DTI_MAX_SUBSTREAMID_WIDTH macro is only used to control the maximum width of the signal. The actual width used by VIP is controlled by configuration parameter svt_dti_port_configuration :: substreamid_width.

Applicable for TBU and ATS protocol.

 rand bit  attribute
 svt_dti_transaction::support_ats_pri_msgs

It represents SUP_PRI field of DTI_ATS_CONDIS_ACK message. This field indicates when register accesses are supported.
Applicable for only ATS protocol.

 rand bit  attribute
 svt_dti_transaction::support_register_access

It represents SUP_REG field of DTI_TBU_CONDIS_REQ message. This field indicates when register accesses are supported.
Applicable for only TBU protocol.

 rand bit  attribute
 svt_dti_transaction::sup_t = 0

SUP_T bit indicates the granted T bit(Trusted_entity) usage in the DTI_ATS_TRANS_REQ,DTI_ATS_INV_REQ,DTI_ATS_PAGE_REQ and DTI_ATS_PAGE_RESP messages. This is feature belongs to RME-DA(Relam management Extension -Device assignment). Applicable for DTI-ATSv3. This field is the member of DTI_ATS_CONDIS_REQ/DTI_ATS_CONDIS_ACK message.

 rand bit  attribute
 svt_dti_transaction::tbi = 0

 rand bit  attribute
 svt_dti_transaction::te_oa = 0

TE bit indicates Security space of the address(OA).This is used when DTI-F, DTI-ATSv3 is supported. This is feature belongs to RME(Relam management Extension). Applicable for DTI-ATSv3. This field is the member of messages DTI_ATS_TRANS_RESP, When '0' indicates OA is Non-secure Address. When '1' indicates OA is realm Address. When DTI_ATS_TRANS_REQ.T is '0', TE is Reserved(SBZ).

 rand bit [3:0]   attribute
 svt_dti_transaction::token_invalidation

It represents TOK_INV_GNT field of DTI messages.
Applicable for TBU and ATS protocol.

 rand bit [SVT_DTI_MAX_TRL_TOKEN_WIDTH-1:0]  attribute
 svt_dti_transaction::token_translation

It represents TOK_TRANS_REQ field of DTI_TBU_CONDIS_REQ, DTI_ATS_CONDIS_REQ and TOK_TRANS_GNT field of DTI_TBU_CONDIS_ACK, DTI_ATS_CONDIS_ACK messages.
Applicable for TBU and ATS protocol.

 rand bit [SVT_DTI_MAX_ADDR_WIDTH-1:0]  attribute
 svt_dti_transaction::translated_addr

currently not supported yet and may undergo changes

 rand bit [SVT_DTI_TRANS_RNG_WIDTH-1:0]  attribute
 svt_dti_transaction::translation_address_range = 2

 rand bit [1:0]   attribute
 svt_dti_transaction::translation_granule_size = 2'b00

It represents TG field of DTI_TBU_INV_REQ message.
This field relates to range invalidate operation. TG is when OPERATION is a TLB Invalidate operation.
Refer to specifcation for details.

Applicable for TBU protocol. Applicable from Spec version E onwards.

 rand bit [1:0]   attribute
 svt_dti_transaction::translation_table_level = 0

It represents TTL field of DTI_TBU_INV_REQ message.
This field relates to range invalidate operation. TTL is when OPERATION is a TLB Invalidate operation.
Refer to specifcation for details.

Applicable for TBU protocol.
Applicable from Spec version E onwards.

 svt_axi_master_transaction  attribute
 svt_dti_transaction::transport_axi_xact

Transaction handle to be used to send DTI message over Axi4_Stream Transport layer. User can construct the axi master transaction object in the DTI sequence with required parameters and DTI component will use this transaction handle to send it over Axi4_Stream interface as received with DTI message as payload. Note: If this transaction handle is found to be null then DTI component will simply use a new axi master transaction object with its own randomized parameters.

 rand bit [3:0]   attribute
 svt_dti_transaction::trans_req_imp_def = 0

It represents IMP_DEF (implementation defined) field of DTI_TBU_TRANS_REQ message.
trans_req_imp_def is at bit[72:76] of DTI_TBU_TRANS_REQ.

Applicable for TBU protocol.

 rand bit [3:0]   attribute
 svt_dti_transaction::trans_resp_imp_def = 0

It represents IMP_DEF (implementation defined) field of DTI_TBU_TRANS_RESP message. trans_resp_imp_def is at bit [159:156] of DTI_TBU_TRANS_RESP.

Applicable for TBU protocol.

 rand bit [7:0]   attribute
 svt_dti_transaction::translation_attributes

It represents ATTR field of DTI_TBU_TRANS_RESP message.
This field indicates the translation attributes. Refer to the specification for details.

Applicable for TBU protocol.

 rand bit  attribute
 svt_dti_transaction::trusted_entity = 0

T bit indicates Trusted entity, used when SUP_T is supported. This is feature belongs to RME-DA(Relam management Extension -Device assignment). Applicable for DTI-ATSv3. This field is the member of various messages DTI_ATS_CONDIS_REQ/DTI_ATS_CONDIS_ACK, DTI_ATS_TRANS_REQ,DTI_ATS_INV_REQ, DTI_ATS_PAGE_REQ and DTI_ATS_PAGE_RESP message. When '0' indicates non-secure streamID When '1' indicates realm streamID.

 rand bit  attribute
 svt_dti_transaction::untranslated

 rand bit  attribute
 svt_dti_transaction::valid_substream

It represents SSV field in DTI_TBU_TRANS_REQ/DTI_ATS_TRANS_REQ/DTI_ATS_PAGE_REQ/DTI_ATS_PAGE_RESP.
This bit indicates whether a valid SubstreamID is associated with this translation.
When '1' this bit indicates that SSID is valid.

Applicable for TBU and ATS protocol.

 rand bit [51:0]   attribute
 svt_dti_transaction::va_ipa = 0

 rand bit [15:0]   attribute
 svt_dti_transaction::vmid

 rand bit  attribute
 svt_dti_transaction::write_access

It represents nW field of DTI_ATS_TRANS_REQ message.
When '0': Read and write access.
When '1': Read-only access.

Applicable for ATS protocol.

 svt_dti_transaction :: xact_status_enum_type  attribute
 svt_dti_transaction::xact_status = INITIAL

This represents current status of the DTI transaction. If transaction is complete then it is updated with COMPLETE status. If transaciton is aborted then it is updated with ABORTED status. If transaction is being transported then it is updated with TRANSPORT_STARTED status. If it is yet to be processed then xact_status is set to INITIAL.

Default Value: INITIAL

Member Typedef Documentation

 typedef enum  svt_dti_transaction::ats_fault_type_enum
INVALID_TRANSLATION(SVT_DTI_TRANSACTION_FAULT_TYPE_INVALID_TRANSLATION)
COMPLETER_ABORT(SVT_DTI_TRANSACTION_FAULT_TYPE_COMPLETER_ABORT)
UNSUPPORTED_REQUEST(SVT_DTI_TRNSACTION_FAULT_TYPE_UNSUPPORTED_REQUEST)
RESERVED_FAULT_TYPE(SVT_DTI_TRANSACTION_FAULT_TYPE_RESERVED)

 typedef enum  svt_dti_transaction::dti_channel_type_enum
Enum to represent DTI message type
DTI_TX(0)
DTI_RX(1)

 typedef enum  svt_dti_transaction::dti_message_type_enum
Enum to represent DTI message type
DTI_TBU_CONDIS_REQ(0)
DTI_TBU_CONDIS_ACK(1)
DTI_TBU_TRANS_REQ(2)
DTI_TBU_TRANS_RESP(3)
DTI_TBU_TRANS_FAULT(4)
DTI_TBU_INV_REQ(5)
DTI_TBU_INV_ACK(6)
DTI_TBU_SYNC_REQ(7)
DTI_TBU_SYNC_ACK(8)
DTI_TBU_REG_WRITE(9)
DTI_TBU_REG_WACK(10)
DTI_TBU_REG_READ(11)
DTI_TBU_REG_RDATA(12)
DTI_ATS_CONDIS_REQ(13)
DTI_ATS_CONDIS_ACK(14)
DTI_ATS_TRANS_REQ(15)
DTI_ATS_TRANS_RESP(16)
DTI_ATS_TRANS_FAULT(17)
DTI_ATS_INV_REQ(18)
DTI_ATS_INV_ACK(19)
DTI_ATS_SYNC_REQ(20)
DTI_ATS_SYNC_ACK(21)
DTI_ATS_PAGE_REQ(22)
DTI_ATS_PAGE_ACK(23)
DTI_ATS_PAGE_RESP(24)
DTI_TBU_MASTER_IMP_DEF_TYPE1_REQ(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE1_REQ)
DTI_TBU_MASTER_IMP_DEF_TYPE1_RESP(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE1_RESP)
DTI_TBU_MASTER_IMP_DEF_TYPE2_REQ(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_REQ)
DTI_TBU_MASTER_IMP_DEF_TYPE2_RESP(SVT_DTI_TBU_MASTER_IMP_DEF_TYPE2_RESP)
DTI_TBU_SLAVE_IMP_DEF_TYPE1_REQ(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE1_REQ)
DTI_TBU_SLAVE_IMP_DEF_TYPE1_RESP(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE1_RESP)
DTI_TBU_SLAVE_IMP_DEF_TYPE2_REQ(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE2_REQ)
DTI_TBU_SLAVE_IMP_DEF_TYPE2_RESP(SVT_DTI_TBU_SLAVE_IMP_DEF_TYPE2_RESP)
DTI_ATS_PAGE_RESPACK(33)
DTI_TBU_TRANS_RESPEX(34)
DTI_ATS_INV_COMP(35)

 typedef enum  svt_dti_transaction::exception_level_enum
EXCEPTION_LEVEL_1(SVT_DTI_TRANSACTION_STRW_EL1)
EXCEPTION_LEVEL_1_S2(SVT_DTI_TRANSACTION_STRW_EL1_S2)
EXCEPTION_LEVEL_2(SVT_DTI_TRANSACTION_STRW_EL2)
EXCEPTION_LEVEL_3(SVT_DTI_TRANSACTION_STRW_EL3)

 typedef enum  svt_dti_transaction::fault_type_enum
NON_ABORT(SVT_DTI_TRANSACTION_FAULT_TYPE_NON_ABORT)
ABORT(SVT_DTI_TRANSACTION_FAULT_TYPE_ABORT)
STREAM_DISABLED(SVT_DTI_TRANSACTION_FAULT_TYPE_STREAM_DISABLED)
GLOBAL_DISABLED(SVT_DTI_TRANSACTION_FAULT_TYPE_GLOBAL_DISABLED)
TRANSLATION_PRI(SVT_DTI_TRANSACTION_FAULT_TYPE_TRANSLATION_PRI)
TRANSLATION_STALL(SVT_DTI_TRANSACTION_FAULT_TYPE_TRANSLATION_STALL)

 typedef enum  svt_dti_transaction::invalidation_address_range_enum
Enum to indicate range of address for invalidation
RANGE_4KB(SVT_DTI_TRANSACTION_INVAL_RNG_4KB)
RANGE_16KB(SVT_DTI_TRANSACTION_INVAL_RNG_16KB)
RANGE_64KB(SVT_DTI_TRANSACTION_INVAL_RNG_64KB)
RANGE_2MB(SVT_DTI_TRANSACTION_INVAL_RNG_2MB)
RANGE_32MB(SVT_DTI_TRANSACTION_INVAL_RNG_32MB)
RANGE_512MB(SVT_DTI_TRANSACTION_INVAL_RNG_512MB)
RANGE_1GB(SVT_DTI_TRANSACTION_INVAL_RNG_1GB)
RANGE_RSVD_7(SVT_DTI_TRANSACTION_INVAL_RNG_RSVD_7)
RANGE_4TB(SVT_DTI_TRANSACTION_INVAL_RNG_4TB)

 typedef enum  svt_dti_transaction::output_address_size_enum
ADDR_SIZE_32BITS(SVT_DTI_TRANSACTION_OAS_32BITS)
ADDR_SIZE_36BITS(SVT_DTI_TRANSACTION_OAS_36BITS)
ADDR_SIZE_40BITS(SVT_DTI_TRANSACTION_OAS_40BITS)
ADDR_SIZE_42BITS(SVT_DTI_TRANSACTION_OAS_42BITS)
ADDR_SIZE_44BITS(SVT_DTI_TRANSACTION_OAS_44BITS)
ADDR_SIZE_48BITS(SVT_DTI_TRANSACTION_OAS_48BITS)
ADDR_SIZE_52BITS(SVT_DTI_TRANSACTION_OAS_52BITS)

 typedef enum  svt_dti_transaction::override_InD_enum
USE_INCOMING(SVT_DTI_TRANSACTION_INSTCFG_USE_INCOMING)
RESERVED_IND(SVT_DTI_TRANSACTION_INSTCFG_RESERVED)
DATA(SVT_DTI_TRANSACTION_INSTCFG_DATA)
INSTRUCTION(SVT_DTI_TRANSACTION_INSTCFG_INSTRUCTION)

 typedef enum  svt_dti_transaction::override_PnU_enum
USE_INCOMING_PNU(SVT_DTI_TRANSACTION_PRIVCFG_USE_INCOMING)
RESERVED_PNU(SVT_DTI_TRANSACTION_PRIVCFG_RESERVED)
UNPRIVILEGED(SVT_DTI_TRANSACTION_PRIVCFG_UNPRIVILEGED)
PRIVILEGED(SVT_DTI_TRANSACTION_PRIVCFG_PRIVILEGED)

 typedef enum  svt_dti_transaction::page_response_type_enum
RESPONSE_FAILURE(SVT_DTI_PAGE_RESP_TYPE_RESPONSE_FAILURE)
INVALID_REQUEST(SVT_DTI_PAGE_RESP_TYPE_INVALID_REQUEST)
SUCCESS(SVT_DTI_PAGE_RESP_TYPE_SUCCESS)
RSVD(SVT_DTI_PAGE_RESP_TYPE_RSVD)

 typedef enum  svt_dti_transaction::permission_required_enum
WRITE_PERM_REQ(SVT_DTI_TRANSACTION_WRITE_PERM_REQ)
READ_PERM_REQ(SVT_DTI_TRANSACTION_READ_PERM_REQ)
READ_WRITE_PERM_REQ(SVT_DTI_TRANSACTION_READ_WRITE_PERM_REQ)
NO_PERM_REQ(SVT_DTI_TRANSACTION_NO_PERM_REQ)

 typedef enum  svt_dti_transaction::read_write_access_enum
READ_WRITE access enum applicable for DTI Edition 2 only (ARM:100225_0000_02en).
WRITE_ACCESS(SVT_DTI_TRANSACTION_RNW_WRITE_ACCESS)
READ_ACCESS(SVT_DTI_TRANSACTION_RNW_READ_ACCESS)

 typedef enum  svt_dti_transaction::secure_stream_id_status_enum_type
Enum to represent {NSE,NS} state in a transaction
SEC_SID_NON_SECURE(0)
SEC_SID_SECURE(1)
SEC_SID_REALM(2)
SEC_SID_RESERVED(3)

 typedef enum  svt_dti_transaction::shareability_enum
Enum to indicate shareability pf translation
NON_SHARABLE(SVT_DTI_TRANSACTION_SH_NON_SHAREABLE)
RESERVED_SH(SVT_DTI_TRANSACTION_SH_RESERVED)
OUTER_SHARABLE(SVT_DTI_TRANSACTION_SH_OUTER_SHARABLE)
INNER_SHARABLE(SVT_DTI_TRANSACTION_SH_INNER_SHARABLE)

 typedef enum  svt_dti_transaction::state_enum_type
Enum to represent DTI component connection state
INVALID(0)
DISCONNECTED(1)
REQ_CONNECT(2)
CONNECTED(3)
REQ_DISCONNECT(4)

 typedef enum  svt_dti_transaction::trl_flow_enum
STALL(SVT_DTI_TRANSLATION_FLOW_STALL)
ATST(SVT_DTI_TRANSLATION_FLOW_ATST)
NOSTALL(SVT_DTI_TRANSLATION_FLOW_NOSTALL)
PRI(SVT_DTI_TRANSLATION_FLOW_PRI)

 typedef enum  svt_dti_transaction::xact_nse_ns_status_enum_type
Enum to represent {NSE,NS} state in a transaction
SECURE(0)
NON_SECURE(1)
ROOT(2)
REALM(3)

 typedef enum  svt_dti_transaction::xact_status_enum_type
Enum to represent responses in a transaction
INITIAL()
TRANSPORT_START(1)
TRANSPORT_END(2)
COMPLETE()
PARTIAL_COMPLETE(4)
ABORTED()

13 August 2024, Copyright © 2024 Synopsys, Inc.